diff mbox series

linux-user: implement HWCAP bits on MIPS

Message ID 20180314142018.13612-1-james.cowgill@mips.com
State New
Headers show
Series linux-user: implement HWCAP bits on MIPS | expand

Commit Message

James Cowgill March 14, 2018, 2:20 p.m. UTC
Add support for the two currently defined HWCAP bits on MIPS - R6 and
MSA.

Buglink: https://bugs.launchpad.net/qemu/+bug/1754372
Signed-off-by: James Cowgill <james.cowgill@mips.com>
---
 linux-user/elfload.c | 24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)

Comments

no-reply@patchew.org March 14, 2018, 3:32 p.m. UTC | #1
Hi,

This series seems to have some coding style problems. See output below for
more information:

Type: series
Message-id: 20180314142018.13612-1-james.cowgill@mips.com
Subject: [Qemu-devel] [PATCH] linux-user: implement HWCAP bits on MIPS

=== TEST SCRIPT BEGIN ===
#!/bin/bash

BASE=base
n=1
total=$(git log --oneline $BASE.. | wc -l)
failed=0

git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram

commits="$(git log --format=%H --reverse $BASE..)"
for c in $commits; do
    echo "Checking PATCH $n/$total: $(git log -n 1 --format=%s $c)..."
    if ! git show $c --format=email | ./scripts/checkpatch.pl --mailback -; then
        failed=1
        echo
    fi
    n=$((n+1))
done

exit $failed
=== TEST SCRIPT END ===

Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
 t [tag update]            patchew/20180312220753.20096-1-farosas@linux.vnet.ibm.com -> patchew/20180312220753.20096-1-farosas@linux.vnet.ibm.com
 * [new tag]               patchew/20180314142018.13612-1-james.cowgill@mips.com -> patchew/20180314142018.13612-1-james.cowgill@mips.com
 t [tag update]            patchew/20180314142133.14166-1-drjones@redhat.com -> patchew/20180314142133.14166-1-drjones@redhat.com
Switched to a new branch 'test'
6270103e8e linux-user: implement HWCAP bits on MIPS

=== OUTPUT BEGIN ===
Checking PATCH 1/1: linux-user: implement HWCAP bits on MIPS...
ERROR: braces {} are necessary for all arms of this statement
#35: FILE: linux-user/elfload.c:967:
+    do { if (cpu->env.insn_flags & (flag)) { hwcaps |= hwcap; } } while (0)
[...]

total: 1 errors, 0 warnings, 30 lines checked

Your patch has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

=== OUTPUT END ===

Test command exited with code: 1


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diff mbox series

Patch

diff --git a/linux-user/elfload.c b/linux-user/elfload.c
index 5fc130cc20..747b0ed10b 100644
--- a/linux-user/elfload.c
+++ b/linux-user/elfload.c
@@ -950,6 +950,30 @@  static void elf_core_copy_regs(target_elf_gregset_t *regs, const CPUMIPSState *e
 #define USE_ELF_CORE_DUMP
 #define ELF_EXEC_PAGESIZE        4096
 
+/* See arch/mips/include/uapi/hwcap.h.  */
+enum {
+    HWCAP_MIPS_R6           = (1 << 0),
+    HWCAP_MIPS_MSA          = (1 << 1),
+};
+
+#define ELF_HWCAP get_elf_hwcap()
+
+static uint32_t get_elf_hwcap(void)
+{
+    MIPSCPU *cpu = MIPS_CPU(thread_cpu);
+    uint32_t hwcaps = 0;
+
+#define GET_FEATURE(flag, hwcap) \
+    do { if (cpu->env.insn_flags & (flag)) { hwcaps |= hwcap; } } while (0)
+
+    GET_FEATURE(ISA_MIPS32R6 | ISA_MIPS64R6, HWCAP_MIPS_R6);
+    GET_FEATURE(ASE_MSA, HWCAP_MIPS_MSA);
+
+#undef GET_FEATURE
+
+    return hwcaps;
+}
+
 #endif /* TARGET_MIPS */
 
 #ifdef TARGET_MICROBLAZE