From patchwork Tue Mar 13 13:50:03 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yannick FERTRE X-Patchwork-Id: 885222 X-Patchwork-Delegate: agust@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=st.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 4010B505vzz9sSY for ; Wed, 14 Mar 2018 03:07:40 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 9D668C21DFF; Tue, 13 Mar 2018 16:06:30 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=KHOP_BIG_TO_CC autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id A96D8C21EB1; Tue, 13 Mar 2018 15:59:16 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 2F993C21C6A; Tue, 13 Mar 2018 13:51:37 +0000 (UTC) Received: from mx07-00178001.pphosted.com (mx07-00178001.pphosted.com [62.209.51.94]) by lists.denx.de (Postfix) with ESMTPS id C5C62C21BE5 for ; Tue, 13 Mar 2018 13:51:36 +0000 (UTC) Received: from pps.filterd (m0046668.ppops.net [127.0.0.1]) by mx07-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id w2DDmdrQ030608; Tue, 13 Mar 2018 14:50:26 +0100 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 2gpc5s96x3-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Tue, 13 Mar 2018 14:50:26 +0100 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 65CD841; Tue, 13 Mar 2018 13:50:25 +0000 (GMT) Received: from Webmail-eu.st.com (Safex1hubcas23.st.com [10.75.90.46]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 1695455CC; Tue, 13 Mar 2018 13:50:25 +0000 (GMT) Received: from SAFEX1HUBCAS21.st.com (10.75.90.44) by SAFEX1HUBCAS23.st.com (10.75.90.46) with Microsoft SMTP Server (TLS) id 14.3.361.1; Tue, 13 Mar 2018 14:50:25 +0100 Received: from localhost (10.201.23.68) by Webmail-ga.st.com (10.75.90.48) with Microsoft SMTP Server (TLS) id 14.3.361.1; Tue, 13 Mar 2018 14:50:23 +0100 From: yannick fertre To: Vikas Manocha , Tom Rini , Benjamin Gaignard , Yannick Fertre , Philippe Cornu , "Patrice Chotard" , Patrick DELAUNAY , Christophe KERELLO , Archit Taneja , Andrzej Hajda , "Laurent Pinchart" , David Airlie , Brian Norris , Bhumika Goyal , Gustavo Padovan , "Maarten Lankhorst" , Sean Paul , Albert Aribaud , "Simon Glass" , Anatolij Gustschin , Thierry Reding Date: Tue, 13 Mar 2018 14:50:03 +0100 Message-ID: <1520949014-21468-5-git-send-email-yannick.fertre@st.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1520949014-21468-1-git-send-email-yannick.fertre@st.com> References: <1520949014-21468-1-git-send-email-yannick.fertre@st.com> MIME-Version: 1.0 X-Originating-IP: [10.201.23.68] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2018-03-13_07:, , signatures=0 X-Mailman-Approved-At: Tue, 13 Mar 2018 15:59:01 +0000 Cc: u-boot@lists.denx.de, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org Subject: [U-Boot] [PATCH v3 02/10] video: stm32: stm32_ltdc: update debug log X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Replace macro debug by pr_error, pr_warn or pr_info. Signed-off-by: yannick fertre --- drivers/video/stm32/stm32_ltdc.c | 67 ++++++++++++++++++---------------------- 1 file changed, 30 insertions(+), 37 deletions(-) diff --git a/drivers/video/stm32/stm32_ltdc.c b/drivers/video/stm32/stm32_ltdc.c index bd9c0de..3e12c71 100644 --- a/drivers/video/stm32/stm32_ltdc.c +++ b/drivers/video/stm32/stm32_ltdc.c @@ -5,7 +5,6 @@ * * SPDX-License-Identifier: GPL-2.0+ */ - #include #include #include @@ -13,12 +12,10 @@ #include #include #include +#include #include #include #include -#include - -DECLARE_GLOBAL_DATA_PTR; struct stm32_ltdc_priv { void __iomem *regs; @@ -176,13 +173,13 @@ static u32 stm32_ltdc_get_pixel_format(enum video_log2_bpp l2bpp) case VIDEO_BPP2: case VIDEO_BPP4: default: - debug("%s: warning %dbpp not supported yet, %dbpp instead\n", - __func__, VNBITS(l2bpp), VNBITS(VIDEO_BPP16)); + pr_warn("warning %dbpp not supported yet, %dbpp instead\n", + VNBITS(l2bpp), VNBITS(VIDEO_BPP16)); pf = PF_RGB565; break; } - debug("%s: %d bpp -> ltdc pf %d\n", __func__, VNBITS(l2bpp), pf); + pr_info("%d bpp -> ltdc pf %d\n", VNBITS(l2bpp), pf); return (u32)pf; } @@ -249,7 +246,7 @@ static void stm32_ltdc_set_mode(struct stm32_ltdc_priv *priv, /* Signal polarities */ val = 0; - debug("%s: timing->flags 0x%08x\n", __func__, timings->flags); + dev_info(dev, "timing->flags 0x%08x\n", timings->flags); if (timings->flags & DISPLAY_FLAGS_HSYNC_HIGH) val |= GCR_HSPOL; if (timings->flags & DISPLAY_FLAGS_VSYNC_HIGH) @@ -343,26 +340,25 @@ static int stm32_ltdc_probe(struct udevice *dev) priv->regs = (void *)dev_read_addr(dev); if ((fdt_addr_t)priv->regs == FDT_ADDR_T_NONE) { - debug("%s: ltdc dt register address error\n", __func__); + dev_err(dev, "ltdc dt register address error\n"); return -EINVAL; } ret = clk_get_by_index(dev, 0, &pclk); if (ret) { - debug("%s: peripheral clock get error %d\n", __func__, ret); + dev_err(dev, "peripheral clock get error %d\n", ret); return ret; } ret = clk_enable(&pclk); if (ret) { - debug("%s: peripheral clock enable error %d\n", - __func__, ret); + dev_err(dev, "peripheral clock enable error %d\n", ret); return ret; } ret = reset_get_by_index(dev, 0, &rst); if (ret) { - debug("%s: missing ltdc hardware reset\n", __func__); + dev_err(dev, "missing ltdc hardware reset\n"); return -ENODEV; } @@ -371,42 +367,39 @@ static int stm32_ltdc_probe(struct udevice *dev) #ifdef CONFIG_VIDEO_BRIDGE ret = uclass_get_device(UCLASS_VIDEO_BRIDGE, 0, &bridge); - if (ret) { - debug("%s: No video bridge, or no backlight on bridge\n", - __func__); - } + if (ret) + dev_info(dev, "No video bridge, or no backlight on bridge\n"); if (bridge) { ret = video_bridge_attach(bridge); if (ret) { - debug("%s: fail to attach bridge\n", __func__); + dev_err(dev, "fail to attach bridge\n"); return ret; } } #endif ret = uclass_first_device(UCLASS_PANEL, &panel); if (ret) { - debug("%s: panel device error %d\n", __func__, ret); + dev_err(dev, "panel device error %d\n", ret); return ret; } ret = fdtdec_decode_display_timing(gd->fdt_blob, dev_of_offset(panel), 0, &timings); if (ret) { - debug("%s: decode display timing error %d\n", - __func__, ret); + dev_err(dev, "decode display timing error %d\n", ret); return ret; } rate = clk_set_rate(&pclk, timings.pixelclock.typ); if (rate < 0) { - debug("%s: fail to set pixel clock %d hz %d hz\n", - __func__, timings.pixelclock.typ, rate); + dev_err(dev, "fail to set pixel clock %d hz %d hz\n", + timings.pixelclock.typ, rate); return rate; } - debug("%s: Set pixel clock req %d hz get %d hz\n", __func__, - timings.pixelclock.typ, rate); + dev_info(dev, "set pixel clock req %d hz get %d hz\n", + timings.pixelclock.typ, rate); /* TODO Below parameters are hard-coded for the moment... */ priv->l2bpp = VIDEO_BPP16; @@ -417,12 +410,12 @@ static int stm32_ltdc_probe(struct udevice *dev) priv->crop_h = timings.vactive.typ; priv->alpha = 0xFF; - debug("%s: %dx%d %dbpp frame buffer at 0x%lx\n", __func__, - timings.hactive.typ, timings.vactive.typ, - VNBITS(priv->l2bpp), uc_plat->base); - debug("%s: crop %d,%d %dx%d bg 0x%08x alpha %d\n", __func__, - priv->crop_x, priv->crop_y, priv->crop_w, priv->crop_h, - priv->bg_col_argb, priv->alpha); + dev_info(dev, "%dx%d %dbpp frame buffer at 0x%lx\n", + timings.hactive.typ, timings.vactive.typ, + VNBITS(priv->l2bpp), uc_plat->base); + dev_info(dev, "crop %d,%d %dx%d bg 0x%08x alpha %d\n", + priv->crop_x, priv->crop_y, priv->crop_w, priv->crop_h, + priv->bg_col_argb, priv->alpha); /* Configure & start LTDC */ stm32_ltdc_set_mode(priv, &timings); @@ -437,22 +430,22 @@ static int stm32_ltdc_probe(struct udevice *dev) if (bridge) { ret = video_bridge_set_backlight(bridge, 80); if (ret) { - debug("%s: fail to set backlight\n", __func__); + dev_err(dev, "fail to set backlight\n"); return ret; } } else { ret = panel_enable_backlight(panel); if (ret) { - debug("%s: panel %s enable backlight error %d\n", - __func__, panel->name, ret); + dev_err(dev, "panel %s enable backlight error %d\n", + panel->name, ret); return ret; } } #else ret = panel_enable_backlight(panel); if (ret) { - debug("%s: panel %s enable backlight error %d\n", - __func__, panel->name, ret); + dev_err(dev, "panel %s enable backlight error %d\n", + panel->name, ret); return ret; } #endif @@ -468,7 +461,7 @@ static int stm32_ltdc_bind(struct udevice *dev) uc_plat->size = CONFIG_VIDEO_STM32_MAX_XRES * CONFIG_VIDEO_STM32_MAX_YRES * (CONFIG_VIDEO_STM32_MAX_BPP >> 3); - debug("%s: frame buffer max size %d bytes\n", __func__, uc_plat->size); + dev_info(dev, "frame buffer max size %d bytes\n", uc_plat->size); return 0; }