From patchwork Mon Mar 12 09:50:04 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bich HEMON X-Patchwork-Id: 884377 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=st.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 400CsS5ZRSz9sST for ; Mon, 12 Mar 2018 20:50:36 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752134AbeCLJuc convert rfc822-to-8bit (ORCPT ); Mon, 12 Mar 2018 05:50:32 -0400 Received: from mx07-00178001.pphosted.com ([62.209.51.94]:27779 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751229AbeCLJub (ORCPT ); Mon, 12 Mar 2018 05:50:31 -0400 Received: from pps.filterd (m0046668.ppops.net [127.0.0.1]) by mx07-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id w2C9ncHN011484; Mon, 12 Mar 2018 10:50:06 +0100 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 2gm5q0ryf8-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Mon, 12 Mar 2018 10:50:06 +0100 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 806AA31; Mon, 12 Mar 2018 09:50:05 +0000 (GMT) Received: from Webmail-eu.st.com (sfhdag3node2.st.com [10.75.127.8]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 5928524AE; Mon, 12 Mar 2018 09:50:05 +0000 (GMT) Received: from SFHDAG3NODE1.st.com (10.75.127.7) by SFHDAG3NODE2.st.com (10.75.127.8) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Mon, 12 Mar 2018 10:50:04 +0100 Received: from SFHDAG3NODE1.st.com ([fe80::1166:1abb:aad4:5f86]) by SFHDAG3NODE1.st.com ([fe80::1166:1abb:aad4:5f86%20]) with mapi id 15.00.1347.000; Mon, 12 Mar 2018 10:50:04 +0100 From: Bich HEMON To: Greg Kroah-Hartman , Rob Herring , Mark Rutland , Maxime Coquelin , Alexandre TORGUE , "Jiri Slaby" , "linux-serial@vger.kernel.org" , "devicetree@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" CC: Bich HEMON , Yves COPPEAUX Subject: [PATCH v2 1/2] dt-bindings: serial: stm32: add RS485 optional properties Thread-Topic: [PATCH v2 1/2] dt-bindings: serial: stm32: add RS485 optional properties Thread-Index: AQHTued/ENVr3ErzzUuPUNOVJTRsDQ== Date: Mon, 12 Mar 2018 09:50:04 +0000 Message-ID: <1520848188-7343-2-git-send-email-bich.hemon@st.com> References: <1520848188-7343-1-git-send-email-bich.hemon@st.com> In-Reply-To: <1520848188-7343-1-git-send-email-bich.hemon@st.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-ms-exchange-messagesentrepresentingtype: 1 x-ms-exchange-transport-fromentityheader: Hosted x-originating-ip: [10.75.127.48] MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2018-03-12_05:, , signatures=0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add options for enabling RS485 hardware control and configuring Driver Enable signal: - rs485-rts-delay - rs485-rx-during-tx - rs485-rts-active-low - linux,rs485-enabled-at-boot-time Signed-off-by: Bich Hemon Reviewed-by: Rob Herring --- Documentation/devicetree/bindings/serial/st,stm32-usart.txt | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/serial/st,stm32-usart.txt b/Documentation/devicetree/bindings/serial/st,stm32-usart.txt index d150b04..9d3efed 100644 --- a/Documentation/devicetree/bindings/serial/st,stm32-usart.txt +++ b/Documentation/devicetree/bindings/serial/st,stm32-usart.txt @@ -15,6 +15,8 @@ Required properties: Optional properties: - pinctrl: The reference on the pins configuration - st,hw-flow-ctrl: bool flag to enable hardware flow control. +- rs485-rts-delay, rs485-rx-during-tx, rs485-rts-active-low, + linux,rs485-enabled-at-boot-time: see rs485.txt. - dmas: phandle(s) to DMA controller node(s). Refer to stm32-dma.txt - dma-names: "rx" and/or "tx"