From patchwork Sun Mar 11 11:19:29 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tal Gilboa X-Patchwork-Id: 884236 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=mellanox.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3zzfp75XjPzB3XC for ; Sun, 11 Mar 2018 23:00:47 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932220AbeCKMAq (ORCPT ); Sun, 11 Mar 2018 08:00:46 -0400 Received: from mail-il-dmz.mellanox.com ([193.47.165.129]:54453 "EHLO mellanox.co.il" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S932217AbeCKMAq (ORCPT ); Sun, 11 Mar 2018 08:00:46 -0400 Received: from Internal Mail-Server by MTLPINE1 (envelope-from talgi@mellanox.com) with ESMTPS (AES256-SHA encrypted); 11 Mar 2018 13:20:39 +0200 Received: from gen-l-vrt-178.mtl.labs.mlnx (gen-l-vrt-178.mtl.labs.mlnx [10.137.178.1]) by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id w2BBK4dI002763; Sun, 11 Mar 2018 13:20:04 +0200 Received: from gen-l-vrt-178.mtl.labs.mlnx (localhost [127.0.0.1]) by gen-l-vrt-178.mtl.labs.mlnx (8.14.7/8.14.7) with ESMTP id w2BBK4gs011186; Sun, 11 Mar 2018 13:20:04 +0200 Received: (from talgi@localhost) by gen-l-vrt-178.mtl.labs.mlnx (8.14.7/8.14.7/Submit) id w2BBK4TR011185; Sun, 11 Mar 2018 13:20:04 +0200 From: Tal Gilboa To: Bjorn Helgaas Cc: Linux PCI , Tariq Toukan , Tal Gilboa Subject: [PATCH next V2 1/5] PCI: Add a query function for PCI device's speed cap Date: Sun, 11 Mar 2018 13:19:29 +0200 Message-Id: <1520767173-11090-2-git-send-email-talgi@mellanox.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1520767173-11090-1-git-send-email-talgi@mellanox.com> References: <1520767173-11090-1-git-send-email-talgi@mellanox.com> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org pcie_get_speed_cap() implements the logic for querying a PCI device's maximum speed capability. Change max_link_speed_show() function to use pcie_get_speed_cap(). Signed-off-by: Tal Gilboa --- drivers/pci/pci-sysfs.c | 22 +++++----------------- drivers/pci/pci.c | 42 ++++++++++++++++++++++++++++++++++++++++++ include/linux/pci.h | 7 +++++++ 3 files changed, 54 insertions(+), 17 deletions(-) diff --git a/drivers/pci/pci-sysfs.c b/drivers/pci/pci-sysfs.c index 4933f027..c8b4854 100644 --- a/drivers/pci/pci-sysfs.c +++ b/drivers/pci/pci-sysfs.c @@ -159,29 +159,17 @@ static ssize_t max_link_speed_show(struct device *dev, struct device_attribute *attr, char *buf) { struct pci_dev *pci_dev = to_pci_dev(dev); - u32 linkcap; + enum pci_bus_speed speed; + const char *speed_str; int err; - const char *speed; - err = pcie_capability_read_dword(pci_dev, PCI_EXP_LNKCAP, &linkcap); + err = pcie_get_speed_cap(pci_dev, &speed); if (err) return -EINVAL; - switch (linkcap & PCI_EXP_LNKCAP_SLS) { - case PCI_EXP_LNKCAP_SLS_8_0GB: - speed = "8 GT/s"; - break; - case PCI_EXP_LNKCAP_SLS_5_0GB: - speed = "5 GT/s"; - break; - case PCI_EXP_LNKCAP_SLS_2_5GB: - speed = "2.5 GT/s"; - break; - default: - speed = "Unknown speed"; - } + speed_str = PCIE_SPEED2STR(speed); - return sprintf(buf, "%s\n", speed); + return sprintf(buf, "%s\n", speed_str); } static DEVICE_ATTR_RO(max_link_speed); diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 8c71d1a..7620cc9 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -5164,6 +5164,48 @@ int pcie_get_minimum_link(struct pci_dev *dev, enum pci_bus_speed *speed, EXPORT_SYMBOL(pcie_get_minimum_link); /** + * pcie_get_speed_cap - queries for the PCI device's link speed capability + * @dev: PCI device to query + * @speed: storage for link speed + * + * This function queries the PCI device speed capability. + */ +int pcie_get_speed_cap(struct pci_dev *dev, enum pci_bus_speed *speed) +{ + u32 lnkcap; + int err1, err2; + + *speed = PCI_SPEED_UNKNOWN; + + err1 = pcie_capability_read_dword(dev, PCI_EXP_LNKCAP, + &lnkcap); + if (!err1 && lnkcap) { + if (lnkcap & PCI_EXP_LNKCAP_SLS_8_0GB) + *speed = PCIE_SPEED_8_0GT; + else if (lnkcap & PCI_EXP_LNKCAP_SLS_5_0GB) + *speed = PCIE_SPEED_5_0GT; + else if (lnkcap & PCI_EXP_LNKCAP_SLS_2_5GB) + *speed = PCIE_SPEED_2_5GT; + return 0; + } + + err2 = pcie_capability_read_dword(dev, PCI_EXP_LNKCAP2, + &lnkcap); + if (!err2 && lnkcap) { /* PCIe r3.0-compliant */ + if (lnkcap & PCI_EXP_LNKCAP2_SLS_8_0GB) + *speed = PCIE_SPEED_8_0GT; + else if (lnkcap & PCI_EXP_LNKCAP2_SLS_5_0GB) + *speed = PCIE_SPEED_5_0GT; + else if (lnkcap & PCI_EXP_LNKCAP2_SLS_2_5GB) + *speed = PCIE_SPEED_2_5GT; + return 0; + } + + return err1 ? err1 : err2; +} +EXPORT_SYMBOL(pcie_get_speed_cap); + +/** * pci_select_bars - Make BAR mask from the type of resource * @dev: the PCI device for which BAR mask is made * @flags: resource type mask to be selected diff --git a/include/linux/pci.h b/include/linux/pci.h index e057e8c..54443e4 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -259,6 +259,12 @@ enum pci_bus_speed { PCI_SPEED_UNKNOWN = 0xff, }; +#define PCIE_SPEED2STR(speed) \ + ((speed) == PCIE_SPEED_8_0GT ? "8 GT/s" : \ + (speed) == PCIE_SPEED_5_0GT ? "5 GT/s" : \ + (speed) == PCIE_SPEED_2_5GT ? "2.5 GT/s" : \ + "Unknown speed") + struct pci_cap_saved_data { u16 cap_nr; bool cap_extended; @@ -1077,6 +1083,7 @@ static inline int pci_is_managed(struct pci_dev *pdev) int pcie_set_mps(struct pci_dev *dev, int mps); int pcie_get_minimum_link(struct pci_dev *dev, enum pci_bus_speed *speed, enum pcie_link_width *width); +int pcie_get_speed_cap(struct pci_dev *dev, enum pci_bus_speed *speed); int pcie_flr(struct pci_dev *dev); int __pci_reset_function_locked(struct pci_dev *dev); int pci_reset_function(struct pci_dev *dev);