From patchwork Fri Mar 25 09:46:06 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wei Ni X-Patchwork-Id: 88355 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from mail-ew0-f56.google.com (mail-ew0-f56.google.com [209.85.215.56]) (using TLSv1 with cipher RC4-SHA (128/128 bits)) (Client CN "smtp.gmail.com", Issuer "Google Internet Authority" (verified OK)) by ozlabs.org (Postfix) with ESMTPS id D18ABB6F8F for ; Fri, 25 Mar 2011 20:51:56 +1100 (EST) Received: by ewy27 with SMTP id 27sf71943ewy.11 for ; Fri, 25 Mar 2011 02:51:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=googlegroups.com; s=beta; h=domainkey-signature:x-beenthere:received-spf:x-pgp-universal:from :to:cc:date:subject:thread-topic:thread-index:message-id:references :in-reply-to:accept-language:x-ms-has-attach:x-ms-tnef-correlator :acceptlanguage:mime-version:x-original-sender :x-original-authentication-results:reply-to:precedence:mailing-list :list-id:x-google-group-id:list-post:list-help:list-archive:sender :list-subscribe:list-unsubscribe:content-language:content-type; bh=Q0SpNm3y7BQoDIGpcN8yqhKchoPj3ZzPlg+C0vPgC2o=; b=YS8j2AidKy83OImu/54Wzsyep0lZMPEev0ouBHUXXNMuq8AbZoSsSZS3QrxtlMewrY auKX6ivvtSIrGZq5bBuXdVj9hCOh3BBPhsoRXINqQrOJYnO6g7HbJszmwWiKzxGhc4Po DDxw9rWZ2bNHje8jXsOG0xHE89Eq1e9DBqPGA= DomainKey-Signature: a=rsa-sha1; c=nofws; d=googlegroups.com; s=beta; h=x-beenthere:received-spf:x-pgp-universal:from:to:cc:date:subject :thread-topic:thread-index:message-id:references:in-reply-to :accept-language:x-ms-has-attach:x-ms-tnef-correlator:acceptlanguage :mime-version:x-original-sender:x-original-authentication-results :reply-to:precedence:mailing-list:list-id:x-google-group-id :list-post:list-help:list-archive:sender:list-subscribe :list-unsubscribe:content-language:content-type; b=XVbCqDNW9qoqWITNE6p6m6wcOJn/Dnk6hCW3iCmj3r54Dbj7q8ZrPaSAPAFPSmcTQP BMfC+img5y9VI013VN5k13rGVotcXT6yia8Vh6R5ZWDhY16HFNuNTfSYkwYzIAaTg2SP MWMnrE3TQSMoK0TsZhIDSYYH3pQhJa/iFp3C4= Received: by 10.213.25.71 with SMTP id y7mr1547043ebb.0.1301046359731; Fri, 25 Mar 2011 02:45:59 -0700 (PDT) X-BeenThere: rtc-linux@googlegroups.com Received: by 10.14.41.21 with SMTP id g21ls150557eeb.2.p; Fri, 25 Mar 2011 02:45:58 -0700 (PDT) Received: by 10.14.37.74 with SMTP id x50mr78572eea.41.1301046358678; Fri, 25 Mar 2011 02:45:58 -0700 (PDT) Received: by 10.14.37.74 with SMTP id x50mr78571eea.41.1301046358658; Fri, 25 Mar 2011 02:45:58 -0700 (PDT) Received: from hqemgate03.nvidia.com (hqemgate03.nvidia.com [216.228.121.140]) by gmr-mx.google.com with ESMTPS id w60si268856eew.2.2011.03.25.02.45.57 (version=TLSv1/SSLv3 cipher=OTHER); Fri, 25 Mar 2011 02:45:58 -0700 (PDT) Received-SPF: pass (google.com: domain of wni@nvidia.com designates 216.228.121.140 as permitted sender) client-ip=216.228.121.140; Received: from hqnvupgp06.nvidia.com (Not Verified[216.228.121.13]) by hqemgate03.nvidia.com id ; Fri, 25 Mar 2011 02:53:55 -0700 Received: from hqemhub03.nvidia.com ([172.17.108.22]) by hqnvupgp06.nvidia.com (PGP Universal service); Fri, 25 Mar 2011 02:45:55 -0700 X-PGP-Universal: processed; by hqnvupgp06.nvidia.com on Fri, 25 Mar 2011 02:45:55 -0700 Received: from hkemhub01.nvidia.com (10.18.67.12) by hqemhub03.nvidia.com (172.20.150.15) with Microsoft SMTP Server (TLS) id 8.2.254.0; Fri, 25 Mar 2011 02:46:09 -0700 Received: from HKMAIL01.nvidia.com ([10.18.67.15]) by hkemhub01.nvidia.com ([10.18.67.12]) with mapi; Fri, 25 Mar 2011 17:46:07 +0800 From: Wei Ni To: "a.zummo@towertech.it" , "rtc-linux@googlegroups.com" CC: "linux-tegra@vger.kernel.org" Date: Fri, 25 Mar 2011 17:46:06 +0800 Subject: [rtc-linux] RE: [PATCH v8] mfd: tps6586x: add RTC driver for TI TPS6586x Thread-Topic: [PATCH v8] mfd: tps6586x: add RTC driver for TI TPS6586x Thread-Index: Acvni0xqbatISbv3Sd+iibVjCWzCoQDRgu2g Message-ID: <6B4D417B830BC44B8026029FD256F7F1C2CB3DD48E@HKMAIL01.nvidia.com> References: <1300686161-24712-1-git-send-email-wni@nvidia.com> In-Reply-To: <1300686161-24712-1-git-send-email-wni@nvidia.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: acceptlanguage: en-US MIME-Version: 1.0 X-Original-Sender: wni@nvidia.com X-Original-Authentication-Results: gmr-mx.google.com; spf=pass (google.com: domain of wni@nvidia.com designates 216.228.121.140 as permitted sender) smtp.mail=wni@nvidia.com Reply-To: rtc-linux@googlegroups.com Precedence: list Mailing-list: list rtc-linux@googlegroups.com; contact rtc-linux+owners@googlegroups.com List-ID: X-Google-Group-Id: 712029733259 List-Post: , List-Help: , List-Archive: Sender: rtc-linux@googlegroups.com List-Subscribe: , List-Unsubscribe: , Content-Language: en-US Hi, all Could anyone review this patch? Thanks Wei. -----Original Message----- From: Wei Ni Sent: Monday, March 21, 2011 1:43 PM To: a.zummo@towertech.it; rtc-linux@googlegroups.com Cc: linux-tegra@vger.kernel.org; Wei Ni Subject: [PATCH v8] mfd: tps6586x: add RTC driver for TI TPS6586x From: Wei Ni this driver supports setting of alarms, and reading/setting of time Signed-off-by: Wei Ni --- v8: use OSC_SRC_SEL to select external crystal clock. set alrm->enabled and init the rtc->irq_en. Add suspend/resume callback. drivers/rtc/rtc-tps6586x.c | 34 ++++++++++++++++++++++++++++++---- 1 files changed, 30 insertions(+), 4 deletions(-) diff --git a/drivers/rtc/rtc-tps6586x.c b/drivers/rtc/rtc-tps6586x.c index a42b4bb..b891899 100644 --- a/drivers/rtc/rtc-tps6586x.c +++ b/drivers/rtc/rtc-tps6586x.c @@ -30,6 +30,7 @@ #include #define RTC_CTRL 0xc0 +#define OSC_SRC_SEL BIT(6) /* select internal or external clock */ #define RTC_ENABLE BIT(5) /* enables alarm */ #define RTC_HIRES BIT(4) /* 1Khz or 32Khz updates */ #define RTC_ALARM1_HI 0xc1 @@ -180,6 +181,7 @@ static int tps6586x_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm) seconds += rtc->epoch_start; rtc_time_to_tm(seconds, &alrm->time); + alrm->enabled = rtc->irq_en; return 0; } @@ -286,7 +288,9 @@ static int __devinit tps6586x_rtc_probe(struct platform_device *pdev) /* disable high-res mode, enable tick counting */ err = tps6586x_update(tps_dev, RTC_CTRL, - (RTC_ENABLE | RTC_HIRES), RTC_ENABLE); + (RTC_ENABLE | OSC_SRC_SEL), + (RTC_ENABLE | OSC_SRC_SEL)); + if (err < 0) { dev_err(&pdev->dev, "unable to start counter\n"); goto fail; @@ -299,11 +303,12 @@ static int __devinit tps6586x_rtc_probe(struct platform_device *pdev) IRQF_ONESHOT, "tps6586x-rtc", &pdev->dev); if (err) { - dev_warn(&pdev->dev, "unable to request IRQ(%d)\n", rtc->irq); + dev_warn(&pdev->dev, "unable to request IRQ(%d)\n", + rtc->irq); rtc->irq = -1; } else { disable_irq(rtc->irq); - enable_irq_wake(rtc->irq); + rtc->irq_en = false; } } @@ -327,6 +332,25 @@ static int __devexit tps6586x_rtc_remove(struct platform_device *pdev) return 0; } +static int tps6586x_rtc_suspend(struct platform_device *pdev, + pm_message_t state) +{ + struct tps6586x_rtc *rtc = dev_get_drvdata(&pdev->dev); + + if (device_may_wakeup(pdev)) + enable_irq_wake(rtc->irq); + return 0; +} + +static int tps6586x_rtc_resume(struct platform_device *pdev) +{ + struct tps6586x_rtc *rtc = dev_get_drvdata(&pdev->dev); + + if (device_may_wakeup(pdev)) + disable_irq_wake(rtc->irq); + return 0; +} + static struct platform_driver tps6586x_rtc_driver = { .driver = { .name = "tps6586x-rtc", @@ -334,6 +358,8 @@ static struct platform_driver tps6586x_rtc_driver = { }, .probe = tps6586x_rtc_probe, .remove = __devexit_p(tps6586x_rtc_remove), + .suspend = tps6586x_rtc_suspend, + .resume = tps6586x_rtc_resume, }; static int __init tps6586x_rtc_init(void) @@ -351,4 +377,4 @@ module_exit(tps6586x_rtc_exit); MODULE_DESCRIPTION("TI TPS6586x RTC driver"); MODULE_AUTHOR("NVIDIA Corporation"); MODULE_LICENSE("GPL"); -MODULE_ALIAS("platform:rtc-tps6586x") +MODULE_ALIAS("platform:rtc-tps6586x");