[v5,4/9] dt-bindings: gpio: Add gpio nodes for Actions S900 SoC

Message ID 20180309051345.1011-5-manivannan.sadhasivam@linaro.org
State Changes Requested, archived
Headers show
Series
  • Add Actions Semi S900 pinctrl and gpio support
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Commit Message

Manivannan Sadhasivam March 9, 2018, 5:13 a.m.
Add gpio nodes for Actions Semi S900 SoC.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
---
 .../devicetree/bindings/gpio/actions,owl-gpio.txt  | 90 ++++++++++++++++++++++
 1 file changed, 90 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/gpio/actions,owl-gpio.txt

Comments

Rob Herring March 18, 2018, 12:53 p.m. | #1
On Fri, Mar 09, 2018 at 10:43:40AM +0530, Manivannan Sadhasivam wrote:
> Add gpio nodes for Actions Semi S900 SoC.
> 
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> ---
>  .../devicetree/bindings/gpio/actions,owl-gpio.txt  | 90 ++++++++++++++++++++++
>  1 file changed, 90 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/gpio/actions,owl-gpio.txt
> 
> diff --git a/Documentation/devicetree/bindings/gpio/actions,owl-gpio.txt b/Documentation/devicetree/bindings/gpio/actions,owl-gpio.txt
> new file mode 100644
> index 000000000000..ad7d32ce2abe
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/gpio/actions,owl-gpio.txt
> @@ -0,0 +1,90 @@
> +* Actions Semi OWL GPIO controller bindings
> +
> +The GPIOs are organized as individual banks/ports with variable number
> +of GPIOs. Each bank is represented as an individual GPIO controller.
> +
> +Required properties:
> +- compatible            : Should be "actions,s900-gpio"
> +- reg                   : Address and range of the GPIO controller registers.
> +- gpio-controller       : Marks the device node as a GPIO controller.
> +- #gpio-cells           : Should be <2>. The first cell is the gpio number
> +                          and the second cell is used to specify optional
> +                          parameters.
> +- ngpios                : Specifies the number of GPIO lines.
> +- interrupt-controller  : Marks the device node as an interrupt controller.
> +- #interrupt-cells      : Specifies the number of cells needed to encode an
> +                          interrupt.  Shall be set to 2.  The first cell
> +                          defines the interrupt number, the second encodes
> +                          the trigger flags described in
> +                          bindings/interrupt-controller/interrupts.txt
> +
> +Optional properties:
> +- gpio-ranges           : Mapping between GPIO and pinctrl
> +
> +Examples:
> +
> +       gpioa: gpio@e01b0000 {
> +               compatible = "actions,s900-gpio";
> +               reg = <0x0 0xe01b0000 0x0 0x1000>;
> +               gpio-controller;
> +               #gpio-cells = <2>;
> +               gpio-ranges = <&pinctrl 0 0 32>;
> +               ngpios = <32>;

This is only needed if the number of gpios is reduced for some reason 
such as not pinned out. IOW, 32 is implied because that's the size of 
each bank.

> +               interrupt-controller;
> +               #interrupt-cells = <2>;
> +       };
> +
> +       gpiob: gpio@e01b000c {
> +               compatible = "actions,s900-gpio";
> +               reg = <0x0 0xe01b000c 0x0 0x1000>;

Due to the sizes, these are still overlapping.

Rob

> +               gpio-controller;
> +               #gpio-cells = <2>;
> +               gpio-ranges = <&pinctrl 0 32 32>;
> +               ngpios = <32>;
> +               interrupt-controller;
> +               #interrupt-cells = <2>;
> +       };
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Manivannan Sadhasivam March 20, 2018, 10:28 a.m. | #2
Hi Rob,

On Sun, Mar 18, 2018 at 07:53:04AM -0500, Rob Herring wrote:
> On Fri, Mar 09, 2018 at 10:43:40AM +0530, Manivannan Sadhasivam wrote:
> > Add gpio nodes for Actions Semi S900 SoC.
> > 
> > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> > ---
> >  .../devicetree/bindings/gpio/actions,owl-gpio.txt  | 90 ++++++++++++++++++++++
> >  1 file changed, 90 insertions(+)
> >  create mode 100644 Documentation/devicetree/bindings/gpio/actions,owl-gpio.txt
> > 
> > diff --git a/Documentation/devicetree/bindings/gpio/actions,owl-gpio.txt b/Documentation/devicetree/bindings/gpio/actions,owl-gpio.txt
> > new file mode 100644
> > index 000000000000..ad7d32ce2abe
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/gpio/actions,owl-gpio.txt
> > @@ -0,0 +1,90 @@
> > +* Actions Semi OWL GPIO controller bindings
> > +
> > +The GPIOs are organized as individual banks/ports with variable number
> > +of GPIOs. Each bank is represented as an individual GPIO controller.
> > +
> > +Required properties:
> > +- compatible            : Should be "actions,s900-gpio"
> > +- reg                   : Address and range of the GPIO controller registers.
> > +- gpio-controller       : Marks the device node as a GPIO controller.
> > +- #gpio-cells           : Should be <2>. The first cell is the gpio number
> > +                          and the second cell is used to specify optional
> > +                          parameters.
> > +- ngpios                : Specifies the number of GPIO lines.
> > +- interrupt-controller  : Marks the device node as an interrupt controller.
> > +- #interrupt-cells      : Specifies the number of cells needed to encode an
> > +                          interrupt.  Shall be set to 2.  The first cell
> > +                          defines the interrupt number, the second encodes
> > +                          the trigger flags described in
> > +                          bindings/interrupt-controller/interrupts.txt
> > +
> > +Optional properties:
> > +- gpio-ranges           : Mapping between GPIO and pinctrl
> > +
> > +Examples:
> > +
> > +       gpioa: gpio@e01b0000 {
> > +               compatible = "actions,s900-gpio";
> > +               reg = <0x0 0xe01b0000 0x0 0x1000>;
> > +               gpio-controller;
> > +               #gpio-cells = <2>;
> > +               gpio-ranges = <&pinctrl 0 0 32>;
> > +               ngpios = <32>;
> 
> This is only needed if the number of gpios is reduced for some reason 
> such as not pinned out. IOW, 32 is implied because that's the size of 
> each bank.
> 

Okay. Then I can remove ngpio property for banks which has 32 GPIOs.

> > +               interrupt-controller;
> > +               #interrupt-cells = <2>;
> > +       };
> > +
> > +       gpiob: gpio@e01b000c {
> > +               compatible = "actions,s900-gpio";
> > +               reg = <0x0 0xe01b000c 0x0 0x1000>;
> 
> Due to the sizes, these are still overlapping.
> 

Oops, will fix the size.

Thanks,
Mani

> Rob
> 
> > +               gpio-controller;
> > +               #gpio-cells = <2>;
> > +               gpio-ranges = <&pinctrl 0 32 32>;
> > +               ngpios = <32>;
> > +               interrupt-controller;
> > +               #interrupt-cells = <2>;
> > +       };
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Patch

diff --git a/Documentation/devicetree/bindings/gpio/actions,owl-gpio.txt b/Documentation/devicetree/bindings/gpio/actions,owl-gpio.txt
new file mode 100644
index 000000000000..ad7d32ce2abe
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpio/actions,owl-gpio.txt
@@ -0,0 +1,90 @@ 
+* Actions Semi OWL GPIO controller bindings
+
+The GPIOs are organized as individual banks/ports with variable number
+of GPIOs. Each bank is represented as an individual GPIO controller.
+
+Required properties:
+- compatible            : Should be "actions,s900-gpio"
+- reg                   : Address and range of the GPIO controller registers.
+- gpio-controller       : Marks the device node as a GPIO controller.
+- #gpio-cells           : Should be <2>. The first cell is the gpio number
+                          and the second cell is used to specify optional
+                          parameters.
+- ngpios                : Specifies the number of GPIO lines.
+- interrupt-controller  : Marks the device node as an interrupt controller.
+- #interrupt-cells      : Specifies the number of cells needed to encode an
+                          interrupt.  Shall be set to 2.  The first cell
+                          defines the interrupt number, the second encodes
+                          the trigger flags described in
+                          bindings/interrupt-controller/interrupts.txt
+
+Optional properties:
+- gpio-ranges           : Mapping between GPIO and pinctrl
+
+Examples:
+
+       gpioa: gpio@e01b0000 {
+               compatible = "actions,s900-gpio";
+               reg = <0x0 0xe01b0000 0x0 0x1000>;
+               gpio-controller;
+               #gpio-cells = <2>;
+               gpio-ranges = <&pinctrl 0 0 32>;
+               ngpios = <32>;
+               interrupt-controller;
+               #interrupt-cells = <2>;
+       };
+
+       gpiob: gpio@e01b000c {
+               compatible = "actions,s900-gpio";
+               reg = <0x0 0xe01b000c 0x0 0x1000>;
+               gpio-controller;
+               #gpio-cells = <2>;
+               gpio-ranges = <&pinctrl 0 32 32>;
+               ngpios = <32>;
+               interrupt-controller;
+               #interrupt-cells = <2>;
+       };
+
+       gpioc: gpio@e01b0018 {
+               compatible = "actions,s900-gpio";
+               reg = <0x0 0xe01b0018 0x0 0x1000>;
+               gpio-controller;
+               #gpio-cells = <2>;
+               gpio-ranges = <&pinctrl 0 64 12>;
+               ngpios = <12>;
+               interrupt-controller;
+               #interrupt-cells = <2>;
+       };
+
+       gpiod: gpio@e01b0024 {
+               compatible = "actions,s900-gpio";
+               reg = <0x0 0xe01b0024 0x0 0x1000>;
+               gpio-controller;
+               #gpio-cells = <2>;
+               gpio-ranges = <&pinctrl 0 76 30>;
+               ngpios = <30>;
+               interrupt-controller;
+               #interrupt-cells = <2>;
+       };
+
+       gpioe: gpio@e01b0030 {
+               compatible = "actions,s900-gpio";
+               reg = <0x0 0xe01b0030 0x0 0x1000>;
+               gpio-controller;
+               #gpio-cells = <2>;
+               gpio-ranges = <&pinctrl 0 106 32>;
+               ngpios = <32>;
+               interrupt-controller;
+               #interrupt-cells = <2>;
+       };
+
+       gpiof: gpio@e01b00f0 {
+               compatible = "actions,s900-gpio";
+               reg = <0x0 0xe01b00f0 0x0 0x1000>;
+               gpio-controller;
+               #gpio-cells = <2>;
+               gpio-ranges = <&pinctrl 0 138 8>;
+               ngpios = <8>;
+               interrupt-controller;
+               #interrupt-cells = <2>;
+       };