@@ -462,7 +462,8 @@ static int sdhci_set_ios(struct mmc *mmc)
else
ctrl &= ~SDHCI_CTRL_HISPD;
- if (host->quirks & SDHCI_QUIRK_NO_HISPD_BIT)
+ if ((host->quirks & SDHCI_QUIRK_NO_HISPD_BIT) ||
+ (host->quirks & SDHCI_QUIRK_BROKEN_HISPD_MODE))
ctrl &= ~SDHCI_CTRL_HISPD;
sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
@@ -602,6 +603,11 @@ int sdhci_setup_cfg(struct mmc_config *cfg, struct sdhci_host *host,
cfg->host_caps &= ~MMC_MODE_8BIT;
}
+ if (host->quirks & SDHCI_QUIRK_BROKEN_HISPD_MODE) {
+ cfg->host_caps &= ~MMC_MODE_HS;
+ cfg->host_caps &= ~MMC_MODE_HS_52MHz;
+ }
+
if (host->host_caps)
cfg->host_caps |= host->host_caps;
@@ -213,6 +213,12 @@
#define SDHCI_QUIRK_BROKEN_R1B (1 << 2)
#define SDHCI_QUIRK_NO_HISPD_BIT (1 << 3)
#define SDHCI_QUIRK_BROKEN_VOLTAGE (1 << 4)
+/*
+ * SDHCI_QUIRK_BROKEN_HISPD_MODE
+ * the hardware cannot operate correctly in high-speed mode,
+ * this quirk forces the sdhci host-controller to non high-speed mode
+ */
+#define SDHCI_QUIRK_BROKEN_HISPD_MODE BIT(5)
#define SDHCI_QUIRK_WAIT_SEND_CMD (1 << 6)
#define SDHCI_QUIRK_USE_WIDE8 (1 << 8)