@@ -1050,8 +1050,8 @@ LHZX PPC64LE 011111 rt:5 ra:5 rb:5 01000101110 \
# format:DQ book:I page:59 v2.03 lq Load Qword
LQ PPC64LE 111000 rtp:5 ra:5 imm:12 0000 \
-!constraints { $rtp % 2 == 0 && $ra != 1 && $ra != 13 && $ra != 0 && $ra != $rtp && $imm <= 2032; } \
-!memory { reg_plus_imm($ra, $imm << 4); }
+!constraints { $rtp % 2 == 0 && $rtp != 0 && $rtp != 12 && $ra != 1 && $ra != 13 && $ra != 0 && $ra != $rtp && $imm <= 2032; } \
+!memory { reg_plus_imm($ra, ($imm << 4) + 8); }
# format:X book:I page:65 v:P1 lswi Load String Word Immediate
LSWI PPC64LE 011111 rt:5 ra:5 rb:5 10010101010 \
The pattern for the Load Quadword (lq) instruction is fixed. If rtp is 0 or 12, the instruction will overwrite r0, r1 or r12, r13 respectively. However, r1 is the stack frame pointer and r13 is the thread pointer. So, overwriting them can cause a crash. This is avoided by putting a constraint to prevent rtp from being 0 or 12. For a given effective address (ea), this instruction loads two dwords from ea and ea+8. However, if ea is the start address of the current stack frame, then the value of the back chain dword from the previous stack frame, which is at ea+8, is loaded on to one of the registers. This can cause a mismatch as the addresses may vary across the master and the apprentice instances. This is avoided by always adding 8 to the offset used for calculating the ea. Signed-off-by: Sandipan Das <sandipan@linux.vnet.ibm.com> --- ppc64.risu | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)