[U-Boot,v2,05/10] boards: MCR3000: cleanup config
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Message ID 53dd01f7ca9dec91bc60d682d9947cdbb922b739.1519976944.git.christophe.leroy@c-s.fr
State Superseded
Delegated to: Tom Rini
Headers show
Series
  • Powerpc: mpc8xx: cleanup before migration to DM model
Related show

Commit Message

Christophe Leroy March 2, 2018, 9:32 a.m. UTC
Some config is redundant with Kconfig. Fix it.
Also remove unused configs
Move SDRAM_MAX_SIZE in the only place it is used

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
---
 arch/powerpc/Kconfig         |  1 +
 board/cssi/MCR3000/MCR3000.c |  2 ++
 configs/MCR3000_defconfig    |  2 ++
 include/configs/MCR3000.h    | 22 ----------------------
 4 files changed, 5 insertions(+), 22 deletions(-)

Patch
diff mbox series

diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index e4b3043fa22..3a2653ff0d3 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -32,6 +32,7 @@  config MPC86xx
 
 config 8xx
 	bool "MPC8xx"
+	select BOARD_EARLY_INIT_F
 	imply CMD_REGINFO
 
 endchoice
diff --git a/board/cssi/MCR3000/MCR3000.c b/board/cssi/MCR3000/MCR3000.c
index c9288818049..6939a2cf617 100644
--- a/board/cssi/MCR3000/MCR3000.c
+++ b/board/cssi/MCR3000/MCR3000.c
@@ -16,6 +16,8 @@ 
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#define SDRAM_MAX_SIZE			(32 * 1024 * 1024)
+
 static const uint cs1_dram_table_66[] = {
 	/* DRAM - single read. (offset 0 in upm RAM) */
 	0x0F3DFC04, 0x0FEFBC04, 0x00BE7804, 0x0FFDF400,
diff --git a/configs/MCR3000_defconfig b/configs/MCR3000_defconfig
index 108cf00154a..6a29f9de1ef 100644
--- a/configs/MCR3000_defconfig
+++ b/configs/MCR3000_defconfig
@@ -71,3 +71,5 @@  CONFIG_MPC8XX_FEC=y
 CONFIG_SHA256=y
 CONFIG_LZMA=y
 CONFIG_OF_LIBFDT=y
+CONFIG_USE_BOOTCOMMAND=y
+CONFIG_BOOTCOMMAND="run flashboot"
diff --git a/include/configs/MCR3000.h b/include/configs/MCR3000.h
index 29e61c7c222..ab90ea20d8f 100644
--- a/include/configs/MCR3000.h
+++ b/include/configs/MCR3000.h
@@ -9,7 +9,6 @@ 
 #define __CONFIG_H
 
 /* High Level Configuration Options */
-#define CONFIG_BOARD_EARLY_INIT_F	1	/* Call board_early_init_f */
 #define CONFIG_MISC_INIT_R		1	/* Call misc_init_r	*/
 
 #define CONFIG_EXTRA_ENV_SETTINGS					\
@@ -55,25 +54,16 @@ 
 		"${ofl_args}; "						\
 		"bootm ${loadaddr} - 0xf00000\0"
 
-#define CONFIG_BOOTDELAY		5
-
 #define CONFIG_IPADDR			192.168.0.3
 #define CONFIG_SERVERIP			192.168.0.1
 #define CONFIG_NETMASK			255.0.0.0
 
-#define CONFIG_BOOTCOMMAND		"run flashboot"
-
 #define CONFIG_LOADS_ECHO	1	/* echo on for serial download	*/
-#undef	CONFIG_LOADS_BAUD_CHANGE	/* don't allow baudrate change	*/
 
 #define CONFIG_WATCHDOG		1	/* watchdog enabled */
 
 /* Miscellaneous configurable options */
 
-#ifdef	CONFIG_HUSH_PARSER
-#define	CONFIG_SYS_PROMPT_HUSH_PS2	"S3K> "
-#endif
-
 #define CONFIG_SYS_MEMTEST_START	0x00002000
 #define CONFIG_SYS_MEMTEST_END		0x00800000
 
@@ -91,7 +81,6 @@ 
 
 /* RAM configuration (note that CONFIG_SYS_SDRAM_BASE must be zero) */
 #define	CONFIG_SYS_SDRAM_BASE		0x00000000
-#define SDRAM_MAX_SIZE			(32 * 1024 * 1024)
 
 /* FLASH organization */
 #define CONFIG_SYS_FLASH_BASE		CONFIG_SYS_TEXT_BASE
@@ -121,24 +110,13 @@ 
 #define CONFIG_ENV_OFFSET	(CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE)
 #define CONFIG_ENV_OVERWRITE	1
 
-/* Cache Configuration */
-#define CONFIG_SYS_CACHELINE_SIZE	16
-
 /* Ethernet configuration part */
 #define CONFIG_SYS_DISCOVER_PHY		1
-#ifdef CONFIG_MPC8XX_FEC
 #define CONFIG_MII_INIT			1
-#endif
 
 /* NAND configuration part */
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
 #define CONFIG_SYS_NAND_MAX_CHIPS	1
 #define CONFIG_SYS_NAND_BASE		0x0C000000
 
-/* Internal Definitions */
-
-/* Boot Flags*/
-#define	BOOTFLAG_COLD			0x01
-#define BOOTFLAG_WARM			0x02
-
 #endif /* __CONFIG_H */