From patchwork Thu Mar 1 11:37:01 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andre Przywara X-Patchwork-Id: 879763 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=arm.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3zsVlg370bz9s12 for ; Thu, 1 Mar 2018 22:37:19 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S967754AbeCALhS (ORCPT ); Thu, 1 Mar 2018 06:37:18 -0500 Received: from foss.arm.com ([217.140.101.70]:36632 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S967540AbeCALhR (ORCPT ); Thu, 1 Mar 2018 06:37:17 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 44C5A1529; Thu, 1 Mar 2018 03:37:17 -0800 (PST) Received: from e104803-lin.lan (unknown [10.1.207.46]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id E20DB3F318; Thu, 1 Mar 2018 03:37:15 -0800 (PST) From: Andre Przywara To: Maxime Ripard , Chen-Yu Tsai Cc: Linus Walleij , linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, linux-sunxi@googlegroups.com Subject: [PATCH] pinctrl: sunxi: always look for apb block Date: Thu, 1 Mar 2018 11:37:01 +0000 Message-Id: <20180301113701.8888-1-andre.przywara@arm.com> X-Mailer: git-send-email 2.14.1 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org The Allwinner pinctrl device tree binding suggests that a clock named "apb" would drive the pin controller IP. However (for legacy reasons) we rely on this clock actually being the first clock defined. Since named clocks can be in any order, let's explicitly check for a clock called "apb" first, then revert to using the first (and only!) clock to keep compatibility with older DTs. Signed-off-by: Andre Przywara --- drivers/pinctrl/sunxi/pinctrl-sunxi.c | 17 ++++++++++++++--- 1 file changed, 14 insertions(+), 3 deletions(-) diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.c b/drivers/pinctrl/sunxi/pinctrl-sunxi.c index 4b6cb25bc796..897ba13e6a03 100644 --- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c +++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c @@ -1360,10 +1360,21 @@ int sunxi_pinctrl_init_with_variant(struct platform_device *pdev, goto gpiochip_error; } - clk = devm_clk_get(&pdev->dev, NULL); + clk = devm_clk_get(&pdev->dev, "apb"); if (IS_ERR(clk)) { - ret = PTR_ERR(clk); - goto gpiochip_error; + /* + * If no "apb" clock can be found, try the first one, which + * must be the only one defined. + */ + if (PTR_ERR(clk) == -ENOENT && + of_count_phandle_with_args(node, "clocks", + "#clock-cells") == 1) + clk = devm_clk_get(&pdev->dev, NULL); + + if (IS_ERR(clk)) { + ret = PTR_ERR(clk); + goto gpiochip_error; + } } ret = clk_prepare_enable(clk);