From patchwork Tue Mar 22 05:01:20 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Macpaul Lin X-Patchwork-Id: 87862 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id F1763B6F12 for ; Tue, 22 Mar 2011 16:02:16 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 569F7280A0; Tue, 22 Mar 2011 06:01:54 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id GaJIBTtuHuj3; Tue, 22 Mar 2011 06:01:54 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 13558280C6; Tue, 22 Mar 2011 06:01:44 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 68F772809C for ; Tue, 22 Mar 2011 06:01:42 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id h9nr6rk8khxm for ; Tue, 22 Mar 2011 06:01:41 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from atcpcs01.andestech.com (59-124-160-118.HINET-IP.hinet.net [59.124.160.118]) by theia.denx.de (Postfix) with ESMTP id F41FB2809B for ; Tue, 22 Mar 2011 06:01:33 +0100 (CET) Thread-Index: AcvoTjEPAauzl6BJS+W+78Iex+UoMA== Received: from ATCPCS06.andestech.com ([10.0.1.236]) by atcpcs01.andestech.com with Microsoft SMTPSVC(6.0.3790.4675); Tue, 22 Mar 2011 13:01:23 +0800 Received: from app01.andestech.com ([10.0.4.31]) by ATCPCS06.andestech.com with Microsoft SMTPSVC(6.0.3790.4675); Tue, 22 Mar 2011 13:01:23 +0800 From: "Macpaul Lin" To: , , , Date: Tue, 22 Mar 2011 13:01:20 +0800 Message-ID: <1300770080-9893-4-git-send-email-macpaul@andestech.com> X-Mailer: git-send-email 1.7.3.5 In-Reply-To: <1300770080-9893-1-git-send-email-macpaul@andestech.com> References: <1300770080-9893-1-git-send-email-macpaul@andestech.com> X-MimeOLE: Produced By Microsoft MimeOLE V6.00.3790.4721 Content-class: urn:content-classes:message Importance: normal Priority: normal X-OriginalArrivalTime: 22 Mar 2011 05:01:23.0104 (UTC) FILETIME=[309F7200:01CBE84E] Cc: Macpaul Lin Subject: [U-Boot] [PATCH v2 4/4] ftsmc020: move ftsmc020 static mem controller to driver/mtd X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.9 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Move the header file and definitions of ftsmc020 static memory control unit from a320 SoC folder to "drivers/mtd" folder. This change will let other SoC which also use ftsmc020 could share the same header file. Signed-off-by: Macpaul Lin --- Changes for v2: - Move the header file of ftsmc020.h to include/faraday. - Fix the include path of ftsmc020 for a320evb. - v1 of this patch /patch/71957/ in patchworks has been marked as superseded. arch/arm/cpu/arm920t/a320/Makefile | 1 - arch/arm/cpu/arm920t/a320/ftsmc020.c | 51 ------------------ arch/arm/include/asm/arch-a320/ftsmc020.h | 79 ----------------------------- board/faraday/a320evb/a320evb.c | 2 +- drivers/mtd/Makefile | 1 + drivers/mtd/ftsmc020.c | 51 ++++++++++++++++++ include/configs/a320evb.h | 4 +- include/faraday/ftsmc020.h | 79 +++++++++++++++++++++++++++++ 8 files changed, 135 insertions(+), 133 deletions(-) delete mode 100644 arch/arm/cpu/arm920t/a320/ftsmc020.c delete mode 100644 arch/arm/include/asm/arch-a320/ftsmc020.h create mode 100644 drivers/mtd/ftsmc020.c create mode 100644 include/faraday/ftsmc020.h diff --git a/arch/arm/cpu/arm920t/a320/Makefile b/arch/arm/cpu/arm920t/a320/Makefile index 31da706..50eb265 100644 --- a/arch/arm/cpu/arm920t/a320/Makefile +++ b/arch/arm/cpu/arm920t/a320/Makefile @@ -27,7 +27,6 @@ LIB = $(obj)lib$(SOC).o SOBJS += reset.o COBJS += timer.o -COBJS += ftsmc020.o SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) diff --git a/arch/arm/cpu/arm920t/a320/ftsmc020.c b/arch/arm/cpu/arm920t/a320/ftsmc020.c deleted file mode 100644 index 7646537..0000000 --- a/arch/arm/cpu/arm920t/a320/ftsmc020.c +++ /dev/null @@ -1,51 +0,0 @@ -/* - * (C) Copyright 2009 Faraday Technology - * Po-Yu Chuang - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -#include -#include -#include -#include - -struct ftsmc020_config { - unsigned int config; - unsigned int timing; -}; - -static struct ftsmc020_config config[] = CONFIG_SYS_FTSMC020_CONFIGS; - -static struct ftsmc020 *smc = (struct ftsmc020 *)CONFIG_FTSMC020_BASE; - -static void ftsmc020_setup_bank(unsigned int bank, struct ftsmc020_config *cfg) -{ - if (bank > 3) { - printf("bank # %u invalid\n", bank); - return; - } - - writel(cfg->config, &smc->bank[bank].cr); - writel(cfg->timing, &smc->bank[bank].tpr); -} - -void ftsmc020_init(void) -{ - int i; - - for (i = 0; i < ARRAY_SIZE(config); i++) - ftsmc020_setup_bank(i, &config[i]); -} diff --git a/arch/arm/include/asm/arch-a320/ftsmc020.h b/arch/arm/include/asm/arch-a320/ftsmc020.h deleted file mode 100644 index 95d9500..0000000 --- a/arch/arm/include/asm/arch-a320/ftsmc020.h +++ /dev/null @@ -1,79 +0,0 @@ -/* - * (C) Copyright 2009 Faraday Technology - * Po-Yu Chuang - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -/* - * Static Memory Controller - */ -#ifndef __FTSMC020_H -#define __FTSMC020_H - -#ifndef __ASSEMBLY__ - -struct ftsmc020 { - struct { - unsigned int cr; /* 0x00, 0x08, 0x10, 0x18 */ - unsigned int tpr; /* 0x04, 0x0c, 0x14, 0x1c */ - } bank[4]; - unsigned int pad[8]; /* 0x20 - 0x3c */ - unsigned int ssr; /* 0x40 */ -}; - -void ftsmc020_init(void); - -#endif /* __ASSEMBLY__ */ - -/* - * Memory Bank Configuration Register - */ -#define FTSMC020_BANK_ENABLE (1 << 28) -#define FTSMC020_BANK_BASE(x) ((x) & 0x0fff1000) - -#define FTSMC020_BANK_WPROT (1 << 11) - -#define FTSMC020_BANK_SIZE_32K (0xb << 4) -#define FTSMC020_BANK_SIZE_64K (0xc << 4) -#define FTSMC020_BANK_SIZE_128K (0xd << 4) -#define FTSMC020_BANK_SIZE_256K (0xe << 4) -#define FTSMC020_BANK_SIZE_512K (0xf << 4) -#define FTSMC020_BANK_SIZE_1M (0x0 << 4) -#define FTSMC020_BANK_SIZE_2M (0x1 << 4) -#define FTSMC020_BANK_SIZE_4M (0x2 << 4) -#define FTSMC020_BANK_SIZE_8M (0x3 << 4) -#define FTSMC020_BANK_SIZE_16M (0x4 << 4) -#define FTSMC020_BANK_SIZE_32M (0x5 << 4) - -#define FTSMC020_BANK_MBW_8 (0x0 << 0) -#define FTSMC020_BANK_MBW_16 (0x1 << 0) -#define FTSMC020_BANK_MBW_32 (0x2 << 0) - -/* - * Memory Bank Timing Parameter Register - */ -#define FTSMC020_TPR_ETRNA(x) (((x) & 0xf) << 28) -#define FTSMC020_TPR_EATI(x) (((x) & 0xf) << 24) -#define FTSMC020_TPR_RBE (1 << 20) -#define FTSMC020_TPR_AST(x) (((x) & 0x3) << 18) -#define FTSMC020_TPR_CTW(x) (((x) & 0x3) << 16) -#define FTSMC020_TPR_ATI(x) (((x) & 0xf) << 12) -#define FTSMC020_TPR_AT2(x) (((x) & 0x3) << 8) -#define FTSMC020_TPR_WTC(x) (((x) & 0x3) << 6) -#define FTSMC020_TPR_AHT(x) (((x) & 0x3) << 4) -#define FTSMC020_TPR_TRNA(x) (((x) & 0xf) << 0) - -#endif /* __FTSMC020_H */ diff --git a/board/faraday/a320evb/a320evb.c b/board/faraday/a320evb/a320evb.c index b9343e4..2578be4 100644 --- a/board/faraday/a320evb/a320evb.c +++ b/board/faraday/a320evb/a320evb.c @@ -21,7 +21,7 @@ #include #include -#include +#include DECLARE_GLOBAL_DATA_PTR; diff --git a/drivers/mtd/Makefile b/drivers/mtd/Makefile index 999431c..5a5ecdf 100644 --- a/drivers/mtd/Makefile +++ b/drivers/mtd/Makefile @@ -32,6 +32,7 @@ COBJS-$(CONFIG_HAS_DATAFLASH) += at45.o COBJS-$(CONFIG_FLASH_CFI_DRIVER) += cfi_flash.o COBJS-$(CONFIG_FLASH_CFI_MTD) += cfi_mtd.o COBJS-$(CONFIG_HAS_DATAFLASH) += dataflash.o +COBJS-$(CONFIG_FTSMC020) += ftsmc020.o COBJS-$(CONFIG_FLASH_CFI_LEGACY) += jedec_flash.o COBJS-$(CONFIG_MW_EEPROM) += mw_eeprom.o COBJS-$(CONFIG_SPEARSMI) += spr_smi.o diff --git a/drivers/mtd/ftsmc020.c b/drivers/mtd/ftsmc020.c new file mode 100644 index 0000000..b027685 --- /dev/null +++ b/drivers/mtd/ftsmc020.c @@ -0,0 +1,51 @@ +/* + * (C) Copyright 2009 Faraday Technology + * Po-Yu Chuang + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +#include +#include +#include + +struct ftsmc020_config { + unsigned int config; + unsigned int timing; +}; + +static struct ftsmc020_config config[] = CONFIG_SYS_FTSMC020_CONFIGS; + +static struct ftsmc020 *smc = (struct ftsmc020 *)CONFIG_FTSMC020_BASE; + +static void ftsmc020_setup_bank(unsigned int bank, struct ftsmc020_config *cfg) +{ + if (bank > 3) { + printf("bank # %u invalid\n", bank); + return; + } + + writel(cfg->config, &smc->bank[bank].cr); + writel(cfg->timing, &smc->bank[bank].tpr); +} + +void ftsmc020_init(void) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(config); i++) + ftsmc020_setup_bank(i, &config[i]); +} diff --git a/include/configs/a320evb.h b/include/configs/a320evb.h index 5373bcb..4b297f0 100644 --- a/include/configs/a320evb.h +++ b/include/configs/a320evb.h @@ -163,7 +163,8 @@ * Static memory controller configuration */ -#include +#define CONFIG_FTSMC020 +#include #define FTSMC020_BANK0_CONFIG (FTSMC020_BANK_ENABLE | \ FTSMC020_BANK_BASE(PHYS_FLASH_1) | \ @@ -196,6 +197,7 @@ { FTSMC020_BANK0_CONFIG, FTSMC020_BANK0_TIMING, }, \ { FTSMC020_BANK1_CONFIG, FTSMC020_BANK1_TIMING, }, \ } +#endif /* CONFIG_FTSMC020 */ /*----------------------------------------------------------------------- * FLASH and environment organization diff --git a/include/faraday/ftsmc020.h b/include/faraday/ftsmc020.h new file mode 100644 index 0000000..95d9500 --- /dev/null +++ b/include/faraday/ftsmc020.h @@ -0,0 +1,79 @@ +/* + * (C) Copyright 2009 Faraday Technology + * Po-Yu Chuang + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +/* + * Static Memory Controller + */ +#ifndef __FTSMC020_H +#define __FTSMC020_H + +#ifndef __ASSEMBLY__ + +struct ftsmc020 { + struct { + unsigned int cr; /* 0x00, 0x08, 0x10, 0x18 */ + unsigned int tpr; /* 0x04, 0x0c, 0x14, 0x1c */ + } bank[4]; + unsigned int pad[8]; /* 0x20 - 0x3c */ + unsigned int ssr; /* 0x40 */ +}; + +void ftsmc020_init(void); + +#endif /* __ASSEMBLY__ */ + +/* + * Memory Bank Configuration Register + */ +#define FTSMC020_BANK_ENABLE (1 << 28) +#define FTSMC020_BANK_BASE(x) ((x) & 0x0fff1000) + +#define FTSMC020_BANK_WPROT (1 << 11) + +#define FTSMC020_BANK_SIZE_32K (0xb << 4) +#define FTSMC020_BANK_SIZE_64K (0xc << 4) +#define FTSMC020_BANK_SIZE_128K (0xd << 4) +#define FTSMC020_BANK_SIZE_256K (0xe << 4) +#define FTSMC020_BANK_SIZE_512K (0xf << 4) +#define FTSMC020_BANK_SIZE_1M (0x0 << 4) +#define FTSMC020_BANK_SIZE_2M (0x1 << 4) +#define FTSMC020_BANK_SIZE_4M (0x2 << 4) +#define FTSMC020_BANK_SIZE_8M (0x3 << 4) +#define FTSMC020_BANK_SIZE_16M (0x4 << 4) +#define FTSMC020_BANK_SIZE_32M (0x5 << 4) + +#define FTSMC020_BANK_MBW_8 (0x0 << 0) +#define FTSMC020_BANK_MBW_16 (0x1 << 0) +#define FTSMC020_BANK_MBW_32 (0x2 << 0) + +/* + * Memory Bank Timing Parameter Register + */ +#define FTSMC020_TPR_ETRNA(x) (((x) & 0xf) << 28) +#define FTSMC020_TPR_EATI(x) (((x) & 0xf) << 24) +#define FTSMC020_TPR_RBE (1 << 20) +#define FTSMC020_TPR_AST(x) (((x) & 0x3) << 18) +#define FTSMC020_TPR_CTW(x) (((x) & 0x3) << 16) +#define FTSMC020_TPR_ATI(x) (((x) & 0xf) << 12) +#define FTSMC020_TPR_AT2(x) (((x) & 0x3) << 8) +#define FTSMC020_TPR_WTC(x) (((x) & 0x3) << 6) +#define FTSMC020_TPR_AHT(x) (((x) & 0x3) << 4) +#define FTSMC020_TPR_TRNA(x) (((x) & 0xf) << 0) + +#endif /* __FTSMC020_H */