diff mbox series

[U-Boot,1/2] ARM: dts: imx6ul: add wdog3

Message ID 20180225171248.11992-1-joerg.krause@embedded.rocks
State Accepted
Commit e73edcf18c6751ef5e4809615d37520376d9a06e
Delegated to: Stefano Babic
Headers show
Series [U-Boot,1/2] ARM: dts: imx6ul: add wdog3 | expand

Commit Message

Jörg Krause Feb. 25, 2018, 5:12 p.m. UTC
The i.MX6UL has a WDOG3 located at start address 0x021E0000 in the
AIPS-2 memory region [1].

[1] i.MX 6UltraLite Applications Processor Reference Manual, Rev. 1,
    04/2016, Table-2-3 AIPS-2 memory map, p. 166

Signed-off-by: Jörg Krause <joerg.krause@embedded.rocks>
---
 arch/arm/dts/imx6ul.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)

Comments

Stefano Babic March 29, 2018, 3:56 p.m. UTC | #1
Hi Jörg,

On 25/02/2018 18:12, Jörg Krause wrote:
> The i.MX6UL has a WDOG3 located at start address 0x021E0000 in the
> AIPS-2 memory region [1].
> 
> [1] i.MX 6UltraLite Applications Processor Reference Manual, Rev. 1,
>     04/2016, Table-2-3 AIPS-2 memory map, p. 166
> 
> Signed-off-by: Jörg Krause <joerg.krause@embedded.rocks>
> ---
>  arch/arm/dts/imx6ul.dtsi | 8 ++++++++
>  1 file changed, 8 insertions(+)
> 
> diff --git a/arch/arm/dts/imx6ul.dtsi b/arch/arm/dts/imx6ul.dtsi
> index 7affab866f..b63f5a53ac 100644
> --- a/arch/arm/dts/imx6ul.dtsi
> +++ b/arch/arm/dts/imx6ul.dtsi
> @@ -881,6 +881,14 @@
>  				status = "disabled";
>  			};
>  
> +			wdog3: wdog@021e4000 {
> +				compatible = "fsl,imx6ul-wdt", "fsl,imx21-wdt";
> +				reg = <0x021e4000 0x4000>;
> +				interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
> +				clocks = <&clks IMX6UL_CLK_WDOG3>;
> +				status = "disabled";
> +			};
> +
>  			uart2: serial@021e8000 {
>  				compatible = "fsl,imx6ul-uart",
>  					     "fsl,imx6q-uart";
> 

Applied to u-boot-imx, thanks !

Best regards,
Stefano Babic
diff mbox series

Patch

diff --git a/arch/arm/dts/imx6ul.dtsi b/arch/arm/dts/imx6ul.dtsi
index 7affab866f..b63f5a53ac 100644
--- a/arch/arm/dts/imx6ul.dtsi
+++ b/arch/arm/dts/imx6ul.dtsi
@@ -881,6 +881,14 @@ 
 				status = "disabled";
 			};
 
+			wdog3: wdog@021e4000 {
+				compatible = "fsl,imx6ul-wdt", "fsl,imx21-wdt";
+				reg = <0x021e4000 0x4000>;
+				interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&clks IMX6UL_CLK_WDOG3>;
+				status = "disabled";
+			};
+
 			uart2: serial@021e8000 {
 				compatible = "fsl,imx6ul-uart",
 					     "fsl,imx6q-uart";