From patchwork Mon Mar 21 11:30:34 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nick Clifton X-Patchwork-Id: 87745 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) by ozlabs.org (Postfix) with SMTP id C0BAEB7364 for ; Mon, 21 Mar 2011 22:30:27 +1100 (EST) Received: (qmail 10721 invoked by alias); 21 Mar 2011 11:30:23 -0000 Received: (qmail 10695 invoked by uid 22791); 21 Mar 2011 11:30:20 -0000 X-SWARE-Spam-Status: No, hits=-6.1 required=5.0 tests=AWL, BAYES_00, RCVD_IN_DNSWL_HI, SPF_HELO_PASS, T_FILL_THIS_FORM_SHORT, T_RP_MATCHES_RCVD, T_TVD_MIME_NO_HEADERS X-Spam-Check-By: sourceware.org Received: from mx1.redhat.com (HELO mx1.redhat.com) (209.132.183.28) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Mon, 21 Mar 2011 11:30:10 +0000 Received: from int-mx02.intmail.prod.int.phx2.redhat.com (int-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.12]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id p2LBU2Xe001567 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Mon, 21 Mar 2011 07:30:03 -0400 Received: from Gift.redhat.com (vpn1-6-99.ams2.redhat.com [10.36.6.99]) by int-mx02.intmail.prod.int.phx2.redhat.com (8.13.8/8.13.8) with ESMTP id p2LBTxn5027866; Mon, 21 Mar 2011 07:30:00 -0400 From: Nick Clifton To: gerald@pfeifer.com, joseph@codesourcery.com Cc: gcc-patches@gcc.gnu.org Subject: extend.texi: Fix grammatical problems with builtin machine function descriptions Date: Mon, 21 Mar 2011 11:30:34 +0000 Message-ID: MIME-Version: 1.0 X-IsSubscribed: yes Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Hi Gerald, Hi Joseph, I have a attached a mostly mechanical patch to fix a couple of very minor grammatical issues with the built-in machine function descriptions in the extend.texi file. The first issue is with this sentence: They all generate the machine instruction that is part of the name The problem is that there is more than one name and that the name is a property of the built-in functions. Thus I feel that it is more correct to say: They all generate the machine instruction that is part of their name The second issue is with a couple of sentences which say: The following built-in function is available when option is used. The problem here is that there is more than one built-in function that is enabled by options and so I feel that it is better to say: The following built-in functions are available when option is used. Checked by rebuilding the gcc documentation. OK to apply ? Cheers Nick gcc/ChangeLog 2011-03-21 Nick Clifton * doc/extend.texi (Alpha Built-in Functions, X86 Built-in Functions): Fix grammatical errors. Index: gcc/doc/extend.texi =================================================================== --- gcc/doc/extend.texi (revision 171210) +++ gcc/doc/extend.texi (working copy) @@ -7945,7 +7945,7 @@ processors, depending on the command-line switches used. The following built-in functions are always available. They -all generate the machine instruction that is part of the name. +all generate the machine instruction that is part of their name. @smallexample long __builtin_alpha_implver (void) @@ -7981,7 +7981,7 @@ The following built-in functions are always with @option{-mmax} or @option{-mcpu=@var{cpu}} where @var{cpu} is @code{pca56} or later. They all generate the machine instruction that is part -of the name. +of their name. @smallexample long __builtin_alpha_pklb (long) @@ -8002,7 +8002,7 @@ The following built-in functions are always with @option{-mcix} or @option{-mcpu=@var{cpu}} where @var{cpu} is @code{ev67} or later. They all generate the machine instruction that is part -of the name. +of their name. @smallexample long __builtin_alpha_cttz (long) @@ -8649,7 +8649,7 @@ floating point and @code{TC} 128-bit complex floating point values. The following floating point built-in functions are available in 64-bit -mode. All of them implement the function that is part of the name. +mode. All of them implement the function that is part of their name. @smallexample __float128 __builtin_fabsq (__float128) @@ -8670,7 +8670,8 @@ @end table The following built-in functions are made available by @option{-mmmx}. -All of them generate the machine instruction that is part of the name. +All of them generate the machine instruction that is part of their +name. @smallexample v8qi __builtin_ia32_paddb (v8qi, v8qi) @@ -8731,7 +8732,7 @@ The following built-in functions are made available either with @option{-msse}, or with a combination of @option{-m3dnow} and @option{-march=athlon}. All of them generate the machine -instruction that is part of the name. +instruction that is part of their name. @smallexample v4hi __builtin_ia32_pmulhuw (v4hi, v4hi) @@ -8751,7 +8752,7 @@ @end smallexample The following built-in functions are available when @option{-msse} is used. -All of them generate the machine instruction that is part of the name. +All of them generate the machine instruction that is part of their name. @smallexample int __builtin_ia32_comieq (v4sf, v4sf) @@ -8850,7 +8851,7 @@ @end table The following built-in functions are available when @option{-msse2} is used. -All of them generate the machine instruction that is part of the name. +All of them generate the machine instruction that is part of their name. @smallexample int __builtin_ia32_comisdeq (v2df, v2df) @@ -9010,7 +9011,7 @@ @end smallexample The following built-in functions are available when @option{-msse3} is used. -All of them generate the machine instruction that is part of the name. +All of them generate the machine instruction that is part of their name. @smallexample v2df __builtin_ia32_addsubpd (v2df, v2df) @@ -9035,7 +9036,7 @@ @end table The following built-in functions are available when @option{-mssse3} is used. -All of them generate the machine instruction that is part of the name +All of them generate the machine instruction that is part of their name with MMX registers. @smallexample @@ -9058,7 +9059,7 @@ @end smallexample The following built-in functions are available when @option{-mssse3} is used. -All of them generate the machine instruction that is part of the name +All of them generate the machine instruction that is part of their name with SSE registers. @smallexample @@ -9081,7 +9082,7 @@ @end smallexample The following built-in functions are available when @option{-msse4.1} is -used. All of them generate the machine instruction that is part of the +used. All of them generate the machine instruction that is part of their name. @smallexample @@ -9159,7 +9160,7 @@ @end table The following built-in functions are available when @option{-msse4.2} is -used. All of them generate the machine instruction that is part of the +used. All of them generate the machine instruction that is part of their name. @smallexample @@ -9208,7 +9209,7 @@ @end table The following built-in functions are available when @option{-mavx} is -used. All of them generate the machine instruction that is part of the +used. All of them generate the machine instruction that is part of their name. @smallexample @@ -9343,8 +9344,8 @@ @end smallexample The following built-in functions are available when @option{-maes} is -used. All of them generate the machine instruction that is part of the -name. +used. All of them generate the machine instruction that is part of +their name. @smallexample v2di __builtin_ia32_aesenc128 (v2di, v2di) @@ -9363,8 +9364,8 @@ Generates the @code{pclmulqdq} machine instruction. @end table -The following built-in function is available when @option{-mfsgsbase} is -used. All of them generate the machine instruction that is part of the +The following built-in functions are available when @option{-mfsgsbase} is +used. All of them generate the machine instruction that is part of their name. @smallexample @@ -9378,9 +9379,9 @@ void _writegsbase_u64 (unsigned long long) @end smallexample -The following built-in function is available when @option{-mrdrnd} is -used. All of them generate the machine instruction that is part of the -name. +The following built-in functions are available when @option{-mrdrnd} is +used. All of them generate the machine instruction that is part of +their name. @smallexample unsigned int __builtin_ia32_rdrand16_step (unsigned short *) @@ -9389,7 +9390,7 @@ @end smallexample The following built-in functions are available when @option{-msse4a} is used. -All of them generate the machine instruction that is part of the name. +All of them generate the machine instruction that is part of their name. @smallexample void __builtin_ia32_movntsd (double *, v2df) @@ -9529,7 +9530,7 @@ @end smallexample The following built-in functions are available when @option{-mfma4} is used. -All of them generate the machine instruction that is part of the name +All of them generate the machine instruction that is part of their name with MMX registers. @smallexample @@ -9586,7 +9587,7 @@ @end smallexample The following built-in functions are available when @option{-mbmi} is used. -All of them generate the machine instruction that is part of the name. +All of them generate the machine instruction that is part of their name. @smallexample unsigned int __builtin_ia32_bextr_u32(unsigned int, unsigned int); unsigned long long __builtin_ia32_bextr_u64 (unsigned long long, unsigned long long); @@ -9604,7 +9605,7 @@ The following built-in functions are available when @option{-m3dnow} is used. -All of them generate the machine instruction that is part of the name. +All of them generate the machine instruction that is part of their name. @smallexample void __builtin_ia32_femms (void) @@ -9631,7 +9632,7 @@ The following built-in functions are available when both @option{-m3dnow} and @option{-march=athlon} are used. All of them generate the machine -instruction that is part of the name. +instruction that is part of their name. @smallexample v2si __builtin_ia32_pf2iw (v2sf)