Message ID | 1519300187-12072-2-git-send-email-vipulk@xilinx.com |
---|---|
State | Superseded |
Delegated to: | Tom Rini |
Headers | show |
Series | arm64: zynqmp: mmc: Moved mmc u-boot headers to the Kconfig | expand |
On 22.2.2018 12:49, Vipul Kumar wrote: > This patch added Kconfig support for CONFIG_ZYNQ_SDHCI0 and > enabled it in respective defconfig. > > Signed-off-by: Vipul Kumar <vipulk@xilinx.com> > Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> > --- > arch/arm/cpu/armv8/zynqmp/Kconfig | 5 +++++ > configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig | 1 + > configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig | 1 + > include/configs/xilinx_zynqmp_zc1751_xm015_dc1.h | 1 - > include/configs/xilinx_zynqmp_zc1751_xm019_dc5.h | 1 - > 5 files changed, 7 insertions(+), 2 deletions(-) > > diff --git a/arch/arm/cpu/armv8/zynqmp/Kconfig b/arch/arm/cpu/armv8/zynqmp/Kconfig > index 9e521ed..f32ced7 100644 > --- a/arch/arm/cpu/armv8/zynqmp/Kconfig > +++ b/arch/arm/cpu/armv8/zynqmp/Kconfig > @@ -89,6 +89,11 @@ config ZYNQMP_PSU_INIT_ENABLED > help > Include psu_init to full u-boot. SPL include psu_init by default. > > +config ZYNQ_SDHCI0 > + bool "Xilinx SDHCI0 controller" Missing dependency on MMC_SDHCI_ZYNQ. The same for patch 2. M > + help > + Enable the SDHCI0 controller for Xilinx ZynqMP. > + > config SPL_ZYNQMP_ALT_BOOTMODE_ENABLED > bool "Overwrite SPL bootmode" > depends on SPL > diff --git a/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig b/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig > index 7da0ca8..05d98c0 100644 > --- a/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig > +++ b/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig > @@ -5,6 +5,7 @@ CONFIG_SYS_TEXT_BASE=0x8000000 > CONFIG_SYS_MALLOC_F_LEN=0x8000 > CONFIG_IDENT_STRING=" Xilinx ZynqMP ZC1751 xm015 dc1" > CONFIG_ZYNQMP_USB=y > +CONFIG_ZYNQ_SDHCI0=y > CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1751-xm015-dc1" > CONFIG_DEBUG_UART=y > CONFIG_AHCI=y > diff --git a/configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig b/configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig > index ac565ec..403cb7c 100644 > --- a/configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig > +++ b/configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig > @@ -4,6 +4,7 @@ CONFIG_ARCH_ZYNQMP=y > CONFIG_SYS_TEXT_BASE=0x8000000 > CONFIG_SYS_MALLOC_F_LEN=0x8000 > CONFIG_IDENT_STRING=" Xilinx ZynqMP ZC1751 xm019 dc5" > +CONFIG_ZYNQ_SDHCI0=y > CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1751-xm019-dc5" > CONFIG_DEBUG_UART=y > CONFIG_DISTRO_DEFAULTS=y > diff --git a/include/configs/xilinx_zynqmp_zc1751_xm015_dc1.h b/include/configs/xilinx_zynqmp_zc1751_xm015_dc1.h > index e3797a8..7bcefad 100644 > --- a/include/configs/xilinx_zynqmp_zc1751_xm015_dc1.h > +++ b/include/configs/xilinx_zynqmp_zc1751_xm015_dc1.h > @@ -10,7 +10,6 @@ > #ifndef __CONFIG_ZYNQMP_ZC1751_XM015_DC1_H > #define __CONFIG_ZYNQMP_ZC1751_XM015_DC1_H > > -#define CONFIG_ZYNQ_SDHCI0 > #define CONFIG_ZYNQ_SDHCI1 > #define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR} > > diff --git a/include/configs/xilinx_zynqmp_zc1751_xm019_dc5.h b/include/configs/xilinx_zynqmp_zc1751_xm019_dc5.h > index 6a0e397..5aaf6c0 100644 > --- a/include/configs/xilinx_zynqmp_zc1751_xm019_dc5.h > +++ b/include/configs/xilinx_zynqmp_zc1751_xm019_dc5.h > @@ -11,7 +11,6 @@ > #ifndef __CONFIG_ZYNQMP_ZC1751_XM019_DC5_H > #define __CONFIG_ZYNQMP_ZC1751_XM019_DC5_H > > -#define CONFIG_ZYNQ_SDHCI0 > > #include <configs/xilinx_zynqmp.h> > >
diff --git a/arch/arm/cpu/armv8/zynqmp/Kconfig b/arch/arm/cpu/armv8/zynqmp/Kconfig index 9e521ed..f32ced7 100644 --- a/arch/arm/cpu/armv8/zynqmp/Kconfig +++ b/arch/arm/cpu/armv8/zynqmp/Kconfig @@ -89,6 +89,11 @@ config ZYNQMP_PSU_INIT_ENABLED help Include psu_init to full u-boot. SPL include psu_init by default. +config ZYNQ_SDHCI0 + bool "Xilinx SDHCI0 controller" + help + Enable the SDHCI0 controller for Xilinx ZynqMP. + config SPL_ZYNQMP_ALT_BOOTMODE_ENABLED bool "Overwrite SPL bootmode" depends on SPL diff --git a/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig b/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig index 7da0ca8..05d98c0 100644 --- a/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig +++ b/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig @@ -5,6 +5,7 @@ CONFIG_SYS_TEXT_BASE=0x8000000 CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_IDENT_STRING=" Xilinx ZynqMP ZC1751 xm015 dc1" CONFIG_ZYNQMP_USB=y +CONFIG_ZYNQ_SDHCI0=y CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1751-xm015-dc1" CONFIG_DEBUG_UART=y CONFIG_AHCI=y diff --git a/configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig b/configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig index ac565ec..403cb7c 100644 --- a/configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig +++ b/configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig @@ -4,6 +4,7 @@ CONFIG_ARCH_ZYNQMP=y CONFIG_SYS_TEXT_BASE=0x8000000 CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_IDENT_STRING=" Xilinx ZynqMP ZC1751 xm019 dc5" +CONFIG_ZYNQ_SDHCI0=y CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1751-xm019-dc5" CONFIG_DEBUG_UART=y CONFIG_DISTRO_DEFAULTS=y diff --git a/include/configs/xilinx_zynqmp_zc1751_xm015_dc1.h b/include/configs/xilinx_zynqmp_zc1751_xm015_dc1.h index e3797a8..7bcefad 100644 --- a/include/configs/xilinx_zynqmp_zc1751_xm015_dc1.h +++ b/include/configs/xilinx_zynqmp_zc1751_xm015_dc1.h @@ -10,7 +10,6 @@ #ifndef __CONFIG_ZYNQMP_ZC1751_XM015_DC1_H #define __CONFIG_ZYNQMP_ZC1751_XM015_DC1_H -#define CONFIG_ZYNQ_SDHCI0 #define CONFIG_ZYNQ_SDHCI1 #define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR} diff --git a/include/configs/xilinx_zynqmp_zc1751_xm019_dc5.h b/include/configs/xilinx_zynqmp_zc1751_xm019_dc5.h index 6a0e397..5aaf6c0 100644 --- a/include/configs/xilinx_zynqmp_zc1751_xm019_dc5.h +++ b/include/configs/xilinx_zynqmp_zc1751_xm019_dc5.h @@ -11,7 +11,6 @@ #ifndef __CONFIG_ZYNQMP_ZC1751_XM019_DC5_H #define __CONFIG_ZYNQMP_ZC1751_XM019_DC5_H -#define CONFIG_ZYNQ_SDHCI0 #include <configs/xilinx_zynqmp.h>