From patchwork Wed Feb 21 06:58:53 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajkumar Rampelli X-Patchwork-Id: 875978 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-pwm-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3zmT1b4hl9z9ry4 for ; Wed, 21 Feb 2018 18:01:55 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751682AbeBUHAE (ORCPT ); Wed, 21 Feb 2018 02:00:04 -0500 Received: from hqemgate16.nvidia.com ([216.228.121.65]:12372 "EHLO hqemgate16.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751630AbeBUHAC (ORCPT ); Wed, 21 Feb 2018 02:00:02 -0500 Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqemgate16.nvidia.com id ; Tue, 20 Feb 2018 23:00:05 -0800 Received: from HQMAIL105.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Tue, 20 Feb 2018 23:00:00 -0800 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Tue, 20 Feb 2018 23:00:00 -0800 Received: from UKMAIL101.nvidia.com (10.26.138.13) by HQMAIL105.nvidia.com (172.20.187.12) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Wed, 21 Feb 2018 06:59:58 +0000 Received: from HQMAIL105.nvidia.com (172.20.187.12) by UKMAIL101.nvidia.com (10.26.138.13) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Wed, 21 Feb 2018 06:59:54 +0000 Received: from rrajk-ubuntu.nvidia.com (10.124.1.5) by HQMAIL105.nvidia.com (172.20.187.12) with Microsoft SMTP Server (TLS) id 15.0.1347.2 via Frontend Transport; Wed, 21 Feb 2018 06:59:46 +0000 From: Rajkumar Rampelli To: , , , , , , , , , , , , , , , , , , , , , , CC: , , , , , , , , Subject: [PATCH 04/10] hwmon: generic-pwm-tachometer: Add DT binding details Date: Wed, 21 Feb 2018 12:28:53 +0530 Message-ID: <1519196339-9377-5-git-send-email-rrajk@nvidia.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1519196339-9377-1-git-send-email-rrajk@nvidia.com> References: <1519196339-9377-1-git-send-email-rrajk@nvidia.com> MIME-Version: 1.0 Sender: linux-pwm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pwm@vger.kernel.org Add DT binding details for the PWM based generic tachometer driver which gets the period of the PWM tach-output from Fan via PWM IP having capability of capturing the signal. Signed-off-by: Rajkumar Rampelli --- .../bindings/hwmon/generic-pwm-tachometer.txt | 25 ++++++++++++++++++++++ 1 file changed, 25 insertions(+) create mode 100644 Documentation/devicetree/bindings/hwmon/generic-pwm-tachometer.txt diff --git a/Documentation/devicetree/bindings/hwmon/generic-pwm-tachometer.txt b/Documentation/devicetree/bindings/hwmon/generic-pwm-tachometer.txt new file mode 100644 index 0000000..3541fe5 --- /dev/null +++ b/Documentation/devicetree/bindings/hwmon/generic-pwm-tachometer.txt @@ -0,0 +1,25 @@ +Device tree bindings for fan tach output connected to PWM controller with +PWM capture capability. + +Required properties: +- compatible : Should be "generic-pwm-tachometer" +- pwms : PWM handle. Please refer pwm.txt DT binding for more details. + +Example: + tegra_tachometer: tachometer@39c0000 { + compatible = "nvidia,tegra186-pwm-tachometer"; + reg = <0x0 0x039c0000 0x0 0x10>; + clocks = <&bpmp_clks TEGRA194_CLK_TACH>; + clock-names = "tachometer"; + resets = <&bpmp_resets TEGRA194_RESET_TACH>; + reset-names = "tachometer"; + nvidia,pulse-per-rev = <2>; + nvidia,sampling-window = <2>; + status = "okay"; + }; + + generic_pwm_tachometer { + compatible = "generic-pwm-tachometer"; + pwms = <&tegra_tachometer 0 1000000>; + status = "okay"; + };