From patchwork Wed Feb 21 06:58:59 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajkumar Rampelli X-Patchwork-Id: 875970 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-pwm-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3zmT0z31tqz9ryG for ; Wed, 21 Feb 2018 18:01:23 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751888AbeBUHBH (ORCPT ); Wed, 21 Feb 2018 02:01:07 -0500 Received: from hqemgate15.nvidia.com ([216.228.121.64]:3323 "EHLO hqemgate15.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751887AbeBUHBG (ORCPT ); Wed, 21 Feb 2018 02:01:06 -0500 Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqemgate15.nvidia.com id ; Tue, 20 Feb 2018 23:01:11 -0800 Received: from HQMAIL108.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Tue, 20 Feb 2018 23:01:05 -0800 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Tue, 20 Feb 2018 23:01:05 -0800 Received: from UKMAIL102.nvidia.com (10.26.138.15) by HQMAIL108.nvidia.com (172.18.146.13) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Wed, 21 Feb 2018 07:01:04 +0000 Received: from HQMAIL105.nvidia.com (172.20.187.12) by UKMAIL102.nvidia.com (10.26.138.15) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Wed, 21 Feb 2018 07:01:00 +0000 Received: from rrajk-ubuntu.nvidia.com (10.124.1.5) by HQMAIL105.nvidia.com (172.20.187.12) with Microsoft SMTP Server (TLS) id 15.0.1347.2 via Frontend Transport; Wed, 21 Feb 2018 07:00:52 +0000 From: Rajkumar Rampelli To: , , , , , , , , , , , , , , , , , , , , , , CC: , , , , , , , , Subject: [PATCH 10/10] arm64: tegra: Add PWM controller on Tegra186 soc Date: Wed, 21 Feb 2018 12:28:59 +0530 Message-ID: <1519196339-9377-11-git-send-email-rrajk@nvidia.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1519196339-9377-1-git-send-email-rrajk@nvidia.com> References: <1519196339-9377-1-git-send-email-rrajk@nvidia.com> MIME-Version: 1.0 Sender: linux-pwm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pwm@vger.kernel.org The NVIDIA Tegra186 SoC has a PWM controller which is used in FAN control use case. Signed-off-by: Rajkumar Rampelli --- arch/arm64/boot/dts/nvidia/tegra186.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot/dts/nvidia/tegra186.dtsi index 37149e9..c6f154e 100644 --- a/arch/arm64/boot/dts/nvidia/tegra186.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra186.dtsi @@ -1032,6 +1032,17 @@ interrupt-parent = <&gic>; }; + pwm@c340000 { + compatible = "nvidia,tegra186-pwm"; + reg = <0x0 0xc340000 0x0 0x10000>; + clocks = <&bpmp TEGRA186_CLK_PWM4>; + clock-names = "pwm"; + #pwm-cells = <2>; + resets = <&bpmp TEGRA186_RESET_PWM4>; + reset-names = "pwm"; + status = "disabled"; + }; + tegra_tachometer: tachometer@39c0000 { compatible = "nvidia,tegra186-pwm-tachometer"; reg = <0x0 0x039c0000 0x0 0x10>;