diff mbox series

[U-Boot] armv8: ls1088qds: Remove CONFIG_ from local defines for FPGA

Message ID 1519029849-5936-1-git-send-email-Ashish.Kumar@nxp.com
State Accepted
Commit b555e293b3ccfea3dd928f942cc9239e26b7ea9a
Delegated to: York Sun
Headers show
Series [U-Boot] armv8: ls1088qds: Remove CONFIG_ from local defines for FPGA | expand

Commit Message

Ashish Kumar Feb. 19, 2018, 8:44 a.m. UTC 
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
---
 include/configs/ls1088aqds.h | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

Comments

York Sun March 21, 2018, 2:56 p.m. UTC | #1 
On 02/19/2018 12:43 AM, Ashish Kumar wrote:
> Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
> ---

Applied to fsl-qoriq master. Thanks.

York
diff mbox series

Patch

diff --git a/include/configs/ls1088aqds.h b/include/configs/ls1088aqds.h
index 5674a5d..1f2161b 100644
--- a/include/configs/ls1088aqds.h
+++ b/include/configs/ls1088aqds.h
@@ -197,7 +197,7 @@  unsigned long get_board_ddr_clk(void);
 					| CSPR_MSEL_GPCM \
 					| CSPR_V)
 
-#define CONFIG_SYS_FPGA_AMASK		IFC_AMASK(64*1024)
+#define SYS_FPGA_AMASK		IFC_AMASK(64 * 1024)
 #if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
 #define CONFIG_SYS_FPGA_CSOR		CSOR_GPCM_ADM_SHIFT(0)
 #else
@@ -226,7 +226,7 @@  unsigned long get_board_ddr_clk(void);
 #define CONFIG_SYS_CSPR2_EXT		CONFIG_SYS_FPGA_CSPR_EXT
 #define CONFIG_SYS_CSPR2		CONFIG_SYS_FPGA_CSPR
 #define CONFIG_SYS_CSPR2_FINAL		SYS_FPGA_CSPR_FINAL
-#define CONFIG_SYS_AMASK2		CONFIG_SYS_FPGA_AMASK
+#define CONFIG_SYS_AMASK2		SYS_FPGA_AMASK
 #define CONFIG_SYS_CSOR2		CONFIG_SYS_FPGA_CSOR
 #define CONFIG_SYS_CS2_FTIM0		SYS_FPGA_CS_FTIM0
 #define CONFIG_SYS_CS2_FTIM1		SYS_FPGA_CS_FTIM1
@@ -262,13 +262,13 @@  unsigned long get_board_ddr_clk(void);
 #define CONFIG_SYS_CS2_FTIM3		CONFIG_SYS_NAND_FTIM3
 #define CONFIG_SYS_CSPR3_EXT		CONFIG_SYS_FPGA_CSPR_EXT
 #define CONFIG_SYS_CSPR3		CONFIG_SYS_FPGA_CSPR
-#define CONFIG_SYS_CSPR3_FINAL		CONFIG_SYS_FPGA_CSPR_FINAL
-#define CONFIG_SYS_AMASK3		CONFIG_SYS_FPGA_AMASK
+#define CONFIG_SYS_CSPR3_FINAL		SYS_FPGA_CSPR_FINAL
+#define CONFIG_SYS_AMASK3		SYS_FPGA_AMASK
 #define CONFIG_SYS_CSOR3		CONFIG_SYS_FPGA_CSOR
-#define CONFIG_SYS_CS3_FTIM0		CONFIG_SYS_FPGA_CS_FTIM0
-#define CONFIG_SYS_CS3_FTIM1		CONFIG_SYS_FPGA_CS_FTIM1
-#define CONFIG_SYS_CS3_FTIM2		CONFIG_SYS_FPGA_CS_FTIM2
-#define CONFIG_SYS_CS3_FTIM3		CONFIG_SYS_FPGA_CS_FTIM3
+#define CONFIG_SYS_CS3_FTIM0		SYS_FPGA_CS_FTIM0
+#define CONFIG_SYS_CS3_FTIM1		SYS_FPGA_CS_FTIM1
+#define CONFIG_SYS_CS3_FTIM2		SYS_FPGA_CS_FTIM2
+#define CONFIG_SYS_CS3_FTIM3		SYS_FPGA_CS_FTIM3
 #endif
 
 #define CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS 5000