diff mbox series

[U-Boot,1/2] qspi: Added Kconfig support for CONFIG_SYS_ZYNQ_QSPI_WAIT

Message ID 1518790466-30036-2-git-send-email-vipulk@xilinx.com
State Superseded
Delegated to: Tom Rini
Headers show
Series spi: Moved spi u-bbot headers to Kconfig | expand

Commit Message

Vipul Kumar Feb. 16, 2018, 2:14 p.m. UTC 
This patch added Kconfig support for CONFIG_SYS_ZYNQ_QSPI_WAIT
and set it to default value 10 milliseconds.

Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
---
 drivers/spi/Kconfig     | 6 ++++++
 drivers/spi/zynq_qspi.c | 3 ---
 2 files changed, 6 insertions(+), 3 deletions(-)

--
2.7.4

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Comments

Michal Simek Feb. 26, 2018, 9:28 a.m. UTC | #1 
On 16.2.2018 15:14, Vipul Kumar wrote:
> This patch added Kconfig support for CONFIG_SYS_ZYNQ_QSPI_WAIT
> and set it to default value 10 milliseconds.
> 
> Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
> Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
> ---
>  drivers/spi/Kconfig     | 6 ++++++
>  drivers/spi/zynq_qspi.c | 3 ---
>  2 files changed, 6 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
> index 235a8c7..436e9ad 100644
> --- a/drivers/spi/Kconfig
> +++ b/drivers/spi/Kconfig
> @@ -204,6 +204,12 @@ config ZYNQ_QSPI
>  	  Zynq QSPI IP core. This IP is used to connect the flash in
>  	  4-bit qspi, 8-bit dual stacked and shared 4-bit dual parallel.
>  
> +config SYS_ZYNQ_QSPI_WAIT
> +	int "Define Zynq QSPI wait time in ms"

here I am missing depends on ZYNQ_QSPI.

M

> +	default 10
> +	help
> +	  Define default Zynq QSPI wait time in milliseconds.
> +
>  endif # if DM_SPI
>  
>  config SOFT_SPI
> diff --git a/drivers/spi/zynq_qspi.c b/drivers/spi/zynq_qspi.c
> index 255e02f..c9241aa 100644
> --- a/drivers/spi/zynq_qspi.c
> +++ b/drivers/spi/zynq_qspi.c
> @@ -46,9 +46,6 @@ DECLARE_GLOBAL_DATA_PTR;
>  #define ZYNQ_QSPI_CR_SS_SHIFT		10	/* Slave select shift */
>  
>  #define ZYNQ_QSPI_FIFO_DEPTH		63
> -#ifndef CONFIG_SYS_ZYNQ_QSPI_WAIT
> -#define CONFIG_SYS_ZYNQ_QSPI_WAIT	CONFIG_SYS_HZ/100	/* 10 ms */
> -#endif
>  
>  /* zynq qspi register set */
>  struct zynq_qspi_regs {
>
diff mbox series

Patch

diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 235a8c7..436e9ad 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -204,6 +204,12 @@  config ZYNQ_QSPI
          Zynq QSPI IP core. This IP is used to connect the flash in
          4-bit qspi, 8-bit dual stacked and shared 4-bit dual parallel.

+config SYS_ZYNQ_QSPI_WAIT
+       int "Define Zynq QSPI wait time in ms"
+       default 10
+       help
+         Define default Zynq QSPI wait time in milliseconds.
+
 endif # if DM_SPI

 config SOFT_SPI
diff --git a/drivers/spi/zynq_qspi.c b/drivers/spi/zynq_qspi.c
index 255e02f..c9241aa 100644
--- a/drivers/spi/zynq_qspi.c
+++ b/drivers/spi/zynq_qspi.c
@@ -46,9 +46,6 @@  DECLARE_GLOBAL_DATA_PTR;
 #define ZYNQ_QSPI_CR_SS_SHIFT          10      /* Slave select shift */

 #define ZYNQ_QSPI_FIFO_DEPTH           63
-#ifndef CONFIG_SYS_ZYNQ_QSPI_WAIT
-#define CONFIG_SYS_ZYNQ_QSPI_WAIT      CONFIG_SYS_HZ/100       /* 10 ms */
-#endif

 /* zynq qspi register set */
 struct zynq_qspi_regs {