From patchwork Mon Feb 12 17:26:45 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Preetham Chandru Ramchandra X-Patchwork-Id: 872203 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3zgCL13CFWz9sBZ for ; Tue, 13 Feb 2018 04:27:53 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753292AbeBLR1w (ORCPT ); Mon, 12 Feb 2018 12:27:52 -0500 Received: from hqemgate16.nvidia.com ([216.228.121.65]:4046 "EHLO hqemgate16.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753302AbeBLR1w (ORCPT ); Mon, 12 Feb 2018 12:27:52 -0500 Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqemgate16.nvidia.com id ; Mon, 12 Feb 2018 09:28:00 -0800 Received: from HQMAIL106.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Mon, 12 Feb 2018 09:27:51 -0800 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Mon, 12 Feb 2018 09:27:51 -0800 Received: from HQMAIL112.nvidia.com (172.18.146.18) by HQMAIL106.nvidia.com (172.18.146.12) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Mon, 12 Feb 2018 17:27:51 +0000 Received: from HQMAIL104.nvidia.com (172.18.146.11) by HQMAIL112.nvidia.com (172.18.146.18) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Mon, 12 Feb 2018 17:27:51 +0000 Received: from hqnvemgw01.nvidia.com (172.20.150.20) by HQMAIL104.nvidia.com (172.18.146.11) with Microsoft SMTP Server id 15.0.1347.2 via Frontend Transport; Mon, 12 Feb 2018 17:27:51 +0000 Received: from pchandru-pc.nvidia.com (Not Verified[10.24.37.8]) by hqnvemgw01.nvidia.com with Trustwave SEG (v7, 5, 8, 10121) id ; Mon, 12 Feb 2018 09:27:50 -0800 From: Preetham Chandru Ramchandra To: , , , , , CC: , , , , , Preetham Ramchandra Subject: [PATCH V7 6/7] ata: ahci_tegra: disable DIPM Date: Mon, 12 Feb 2018 22:56:45 +0530 Message-ID: <1518456406-21564-7-git-send-email-pchandru@nvidia.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1518456406-21564-1-git-send-email-pchandru@nvidia.com> References: <1518456406-21564-1-git-send-email-pchandru@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org From: Preetham Ramchandra tegra does not support DIPM and it should be disabled Signed-off-by: Preetham Chandru R Acked-by: Thierry Reding --- drivers/ata/ahci_tegra.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/ata/ahci_tegra.c b/drivers/ata/ahci_tegra.c index 62f2afb54789..ffad5c61e991 100644 --- a/drivers/ata/ahci_tegra.c +++ b/drivers/ata/ahci_tegra.c @@ -447,7 +447,7 @@ static struct ata_port_operations ahci_tegra_port_ops = { }; static const struct ata_port_info ahci_tegra_port_info = { - .flags = AHCI_FLAG_COMMON, + .flags = AHCI_FLAG_COMMON | ATA_FLAG_NO_DIPM, .pio_mask = ATA_PIO4, .udma_mask = ATA_UDMA6, .port_ops = &ahci_tegra_port_ops,