@@ -10,6 +10,11 @@ config SYS_BOARD
config SYS_CPU
default "sandbox"
+config SANDBOX64
+ bool "Use 64-bit addresses"
+ select PHYS_64BIT
+ select HOST_64BIT
+
config SANDBOX_SPL
bool "Enable SPL for sandbox"
select SUPPORT_SPL
@@ -20,24 +25,25 @@ config SYS_CONFIG_NAME
choice
prompt "Run sandbox on 32/64-bit host"
- default SANDBOX_64BIT
+ default HOST_64BIT
help
Sandbox can be built on 32-bit and 64-bit hosts.
The default is to build on a 64-bit host and run
on a 64-bit host. If you want to run sandbox on
a 32-bit host, change it here.
-config SANDBOX_32BIT
+config HOST_32BIT
bool "32-bit host"
+ depends on !PHYS_64BIT
-config SANDBOX_64BIT
+config HOST_64BIT
bool "64-bit host"
endchoice
config SANDBOX_BITS_PER_LONG
int
- default 32 if SANDBOX_32BIT
- default 64 if SANDBOX_64BIT
+ default 32 if HOST_32BIT
+ default 64 if HOST_64BIT
endmenu
@@ -76,7 +76,7 @@ void *map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)
if (enable_pci_map && !pci_map_physmem(paddr, &len, &map_dev, &ptr)) {
if (plen != len) {
printf("%s: Warning: partial map at %x, wanted %lx, got %lx\n",
- __func__, paddr, len, plen);
+ __func__, (uint)paddr, len, plen);
}
map_len = len;
return ptr;
@@ -2,7 +2,11 @@
# SPDX-License-Identifier: GPL-2.0+
#
+ifdef CONFIG_SANDBOX64
+dtb-$(CONFIG_SANDBOX) += sandbox64.dtb
+else
dtb-$(CONFIG_SANDBOX) += sandbox.dtb
+endif
dtb-$(CONFIG_UT_DM) += test.dtb
targets += $(dtb-y)
new file mode 100644
@@ -0,0 +1,317 @@
+/dts-v1/;
+
+#define USB_CLASS_HUB 9
+
+/ {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ model = "sandbox";
+
+ aliases {
+ eth5 = "/eth@90000000";
+ i2c0 = &i2c_0;
+ pci0 = &pci;
+ rtc0 = &rtc_0;
+ };
+
+ chosen {
+ stdout-path = "/serial";
+ };
+
+ cros_ec: cros-ec@0 {
+ reg = <0 0 0 0>;
+ compatible = "google,cros-ec-sandbox";
+
+ /*
+ * This describes the flash memory within the EC. Note
+ * that the STM32L flash erases to 0, not 0xff.
+ */
+ #address-cells = <1>;
+ #size-cells = <1>;
+ flash@8000000 {
+ reg = <0x08000000 0x20000>;
+ erase-value = <0>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ /* Information for sandbox */
+ ro {
+ reg = <0 0xf000>;
+ };
+ wp-ro {
+ reg = <0xf000 0x1000>;
+ };
+ rw {
+ reg = <0x10000 0x10000>;
+ };
+ };
+ };
+
+ eth@10002000 {
+ compatible = "sandbox,eth";
+ reg = <0x0 0x10002000 0x0 0x1000>;
+ fake-host-hwaddr = [00 00 66 44 22 00];
+ };
+
+ eth@80000000 {
+ compatible = "sandbox,eth-raw";
+ reg = <0x0 0x80000000 0x0 0x1000>;
+ host-raw-interface = "eth0";
+ };
+
+ eth@90000000 {
+ compatible = "sandbox,eth-raw";
+ reg = <0x0 0x90000000 0x0 0x1000>;
+ host-raw-interface = "lo";
+ };
+
+ gpio_a: gpios@0 {
+ gpio-controller;
+ compatible = "sandbox,gpio";
+ #gpio-cells = <1>;
+ gpio-bank-name = "a";
+ num-gpios = <20>;
+ };
+
+ gpio_b: gpios@1 {
+ gpio-controller;
+ compatible = "sandbox,gpio";
+ #gpio-cells = <2>;
+ gpio-bank-name = "b";
+ num-gpios = <10>;
+ };
+
+ hexagon {
+ compatible = "demo-simple";
+ colour = "white";
+ sides = <6>;
+ };
+
+ i2c_0: i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0 0 0 0>;
+ compatible = "sandbox,i2c";
+ clock-frequency = <400000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c0>;
+ eeprom@2c {
+ reg = <0x2c>;
+ compatible = "i2c-eeprom";
+ emul {
+ compatible = "sandbox,i2c-eeprom";
+ sandbox,filename = "i2c.bin";
+ sandbox,size = <128>;
+ };
+ };
+
+ rtc_0: rtc@43 {
+ reg = <0x43>;
+ compatible = "sandbox-rtc";
+ emul {
+ compatible = "sandbox,i2c-rtc";
+ };
+ };
+ sandbox_pmic: sandbox_pmic {
+ reg = <0x40>;
+ };
+ };
+
+ lcd {
+ u-boot,dm-pre-reloc;
+ compatible = "sandbox,lcd-sdl";
+ xres = <1366>;
+ yres = <768>;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ iracibble {
+ gpios = <&gpio_a 1 0>;
+ label = "sandbox:red";
+ };
+
+ martinet {
+ gpios = <&gpio_a 2 0>;
+ label = "sandbox:green";
+ };
+ };
+
+ pci: pci-controller {
+ compatible = "sandbox,pci";
+ device_type = "pci";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ ranges = <0x02000000 0 0x10000000 0 0x10000000 0 0x2000
+ 0x01000000 0 0x20000000 0 0x20000000 0 0x2000>;
+ pci@1f,0 {
+ compatible = "pci-generic";
+ reg = <0xf800 0 0 0 0>;
+ emul@1f,0 {
+ compatible = "sandbox,swap-case";
+ };
+ };
+ };
+
+ pinctrl {
+ compatible = "sandbox,pinctrl";
+
+ pinctrl_i2c0: i2c0 {
+ groups = "i2c";
+ function = "i2c";
+ bias-pull-up;
+ };
+
+ pinctrl_serial0: uart0 {
+ groups = "serial_a";
+ function = "serial";
+ };
+ };
+
+ reset@1 {
+ compatible = "sandbox,reset";
+ };
+
+ spi@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0 0 0 0>;
+ compatible = "sandbox,spi";
+ cs-gpios = <0>, <&gpio_a 0>;
+ firmware_storage_spi: flash@0 {
+ reg = <0>;
+ compatible = "spansion,m25p16", "sandbox,spi-flash";
+ spi-max-frequency = <40000000>;
+ sandbox,filename = "spi.bin";
+ };
+ };
+
+ spl-test {
+ u-boot,dm-pre-reloc;
+ compatible = "sandbox,spl-test";
+ boolval;
+ intval = <1>;
+ intarray = <2 3 4>;
+ byteval = [05];
+ bytearray = [06];
+ longbytearray = [09 0a 0b 0c 0d 0e 0f 10 11];
+ stringval = "message";
+ stringarray = "multi-word", "message";
+ };
+
+ spl-test2 {
+ u-boot,dm-pre-reloc;
+ compatible = "sandbox,spl-test";
+ intval = <3>;
+ intarray = <5>;
+ byteval = [08];
+ bytearray = [01 23 34];
+ longbytearray = [09 0a 0b 0c];
+ stringval = "message2";
+ stringarray = "another", "multi-word", "message";
+ };
+
+ spl-test3 {
+ u-boot,dm-pre-reloc;
+ compatible = "sandbox,spl-test";
+ stringarray = "one";
+ };
+
+ spl-test4 {
+ u-boot,dm-pre-reloc;
+ compatible = "sandbox,spl-test.2";
+ };
+
+ square {
+ compatible = "demo-shape";
+ colour = "blue";
+ sides = <4>;
+ };
+
+ timer {
+ compatible = "sandbox,timer";
+ clock-frequency = <1000000>;
+ };
+
+ tpm {
+ compatible = "google,sandbox-tpm";
+ };
+
+ triangle {
+ compatible = "demo-shape";
+ colour = "cyan";
+ sides = <3>;
+ character = <83>;
+ light-gpios = <&gpio_a 2>, <&gpio_b 6 0>;
+ };
+
+ /* Needs to be available prior to relocation */
+ uart0: serial {
+ compatible = "sandbox,serial";
+ sandbox,text-colour = "cyan";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_serial0>;
+ };
+
+ usb@0 {
+ compatible = "sandbox,usb";
+ status = "disabled";
+ hub {
+ compatible = "sandbox,usb-hub";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ flash-stick {
+ reg = <0>;
+ compatible = "sandbox,usb-flash";
+ };
+ };
+ };
+
+ usb@1 {
+ compatible = "sandbox,usb";
+ hub {
+ compatible = "usb-hub";
+ usb,device-class = <USB_CLASS_HUB>;
+ hub-emul {
+ compatible = "sandbox,usb-hub";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ flash-stick {
+ reg = <0>;
+ compatible = "sandbox,usb-flash";
+ sandbox,filepath = "flash.bin";
+ };
+ };
+ };
+ };
+
+ usb@2 {
+ compatible = "sandbox,usb";
+ status = "disabled";
+ };
+
+ spmi: spmi@0 {
+ compatible = "sandbox,spmi";
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+ pm8916@0 {
+ compatible = "qcom,spmi-pmic";
+ reg = <0x0 0x1>;
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+
+ spmi_gpios: gpios@c000 {
+ compatible = "qcom,pm8916-gpio";
+ reg = <0xc000 0x400>;
+ gpio-controller;
+ gpio-count = <4>;
+ #gpio-cells = <2>;
+ gpio-bank-name="spmi";
+ };
+ };
+ };
+};
+
+#include "cros-ec-keyboard.dtsi"
+#include "sandbox_pmic.dtsi"
@@ -43,9 +43,15 @@ phys_addr_t map_to_sysmem(const void *ptr);
#define readb(addr) ((void)addr, 0)
#define readw(addr) ((void)addr, 0)
#define readl(addr) ((void)addr, 0)
+#ifdef CONFIG_SANDBOX64
+#define readq(addr) ((void)addr, 0)
+#endif
#define writeb(v, addr) ((void)addr)
#define writew(v, addr) ((void)addr)
#define writel(v, addr) ((void)addr)
+#ifdef CONFIG_SANDBOX64
+#define writeq(v, addr) ((void)addr)
+#endif
/*
* Clear and set bits in one shot. These macros can be used to clear and
@@ -51,14 +51,23 @@ typedef __UINT64_TYPE__ u64;
#endif
/*
- * Number of bits in a C 'long' on this architecture. Set this to 32 when
- * building on a 32-bit machine.
+ * Number of bits in a C 'long' on this architecture.
*/
-#define BITS_PER_LONG 32
-
+#ifdef CONFIG_PHYS64
+#define BITS_PER_LONG 64
+#else /* CONFIG_PHYS64 */
+#define BITS_PER_LONG 32
+#endif /* CONFIG_PHYS64 */
+
+#ifdef CONFIG_PHYS64
+typedef unsigned long long dma_addr_t;
+typedef u64 phys_addr_t;
+typedef u64 phys_size_t;
+#else /* CONFIG_PHYS64 */
typedef unsigned long dma_addr_t;
typedef u32 phys_addr_t;
typedef u32 phys_size_t;
+#endif /* CONFIG_PHYS64 */
#endif /* __KERNEL__ */
@@ -5,6 +5,14 @@ F: board/sandbox/
F: include/configs/sandbox.h
F: configs/sandbox_defconfig
+SANDBOX64 BOARD
+M: Simon Glass <sjg@chromium.org>
+M: Mario Six <mario.six@gdsys.cc>
+S: Maintained
+F: board/sandbox/
+F: include/configs/sandbox.h
+F: configs/sandbox64_defconfig
+
SANDBOX_NOBLK BOARD
M: Simon Glass <sjg@chromium.org>
S: Maintained
@@ -24,8 +24,11 @@ single board in board/sandbox.
CONFIG_SANDBOX_BIG_ENDIAN should be defined when running on big-endian
machines.
-By default sandbox builds and runs on 64-bit hosts. If you are going to build
-and run sandbox on a 32-bit host, select CONFIG_SANDBOX_32BIT.
+There are two versions of the sandbox: One using 32-bit-wide integers, and one
+using 64-bit-wide integers. The 32-bit version can be build and run on either
+32 or 64-bit hosts by either selecting or deselecting CONFIG_SANDBOX_32BIT; by
+default, the sandbox it built for a 32-bit host. The sandbox using 64-bit-wide
+integers can only be built on 64-bit hosts.
Note that standalone/API support is not available at present.
@@ -71,9 +71,9 @@ int do_demo_list(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
dev;
ret = uclass_next_device(&dev)) {
printf("entry %d - instance %08x, ops %08x, platdata %08x\n",
- i++, map_to_sysmem(dev),
- map_to_sysmem(dev->driver->ops),
- map_to_sysmem(dev_get_platdata(dev)));
+ i++, (uint)map_to_sysmem(dev),
+ (uint)map_to_sysmem(dev->driver->ops),
+ (uint)map_to_sysmem(dev_get_platdata(dev)));
}
return cmd_process_error(cmdtp, ret);
new file mode 100644
@@ -0,0 +1,200 @@
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SANDBOX64=y
+CONFIG_DEFAULT_DEVICE_TREE="sandbox64"
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_ANDROID_BOOT_IMAGE=y
+CONFIG_FIT=y
+CONFIG_FIT_SIGNATURE=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_BOOTSTAGE=y
+CONFIG_BOOTSTAGE_REPORT=y
+CONFIG_BOOTSTAGE_FDT=y
+CONFIG_BOOTSTAGE_STASH=y
+CONFIG_BOOTSTAGE_STASH_ADDR=0x0
+CONFIG_BOOTSTAGE_STASH_SIZE=0x4096
+CONFIG_CONSOLE_RECORD=y
+CONFIG_CONSOLE_RECORD_OUT_SIZE=0x1000
+CONFIG_SILENT_CONSOLE=y
+CONFIG_PRE_CONSOLE_BUFFER=y
+CONFIG_PRE_CON_BUF_ADDR=0x100000
+CONFIG_LOG=y
+CONFIG_LOG_MAX_LEVEL=6
+CONFIG_CMD_CPU=y
+CONFIG_CMD_LICENSE=y
+CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_ELF is not set
+CONFIG_CMD_ASKENV=y
+CONFIG_CMD_GREPENV=y
+CONFIG_CMD_ENV_CALLBACK=y
+CONFIG_CMD_ENV_FLAGS=y
+CONFIG_LOOPW=y
+CONFIG_CMD_MD5SUM=y
+CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_MX_CYCLIC=y
+CONFIG_CMD_DEMO=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_GPT_RENAME=y
+CONFIG_CMD_IDE=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_READ=y
+CONFIG_CMD_REMOTEPROC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_TFTPPUT=y
+CONFIG_CMD_TFTPSRV=y
+CONFIG_CMD_RARP=y
+CONFIG_CMD_CDP=y
+CONFIG_CMD_SNTP=y
+CONFIG_CMD_DNS=y
+CONFIG_CMD_LINK_LOCAL=y
+CONFIG_CMD_ETHSW=y
+CONFIG_CMD_BMP=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_TIMER=y
+CONFIG_CMD_SOUND=y
+CONFIG_CMD_QFW=y
+CONFIG_CMD_BOOTSTAGE=y
+CONFIG_CMD_PMIC=y
+CONFIG_CMD_REGULATOR=y
+CONFIG_CMD_TPM=y
+CONFIG_CMD_TPM_TEST=y
+CONFIG_CMD_BTRFS=y
+CONFIG_CMD_CBFS=y
+CONFIG_CMD_CRAMFS=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_MTDPARTS=y
+CONFIG_CMD_LOG=y
+CONFIG_MAC_PARTITION=y
+CONFIG_AMIGA_PARTITION=y
+CONFIG_OF_CONTROL=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_HOSTFILE=y
+CONFIG_NETCONSOLE=y
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_DEVRES=y
+CONFIG_DEBUG_DEVRES=y
+CONFIG_ADC=y
+CONFIG_ADC_SANDBOX=y
+CONFIG_CLK=y
+CONFIG_CPU=y
+CONFIG_DM_DEMO=y
+CONFIG_DM_DEMO_SIMPLE=y
+CONFIG_DM_DEMO_SHAPE=y
+CONFIG_PM8916_GPIO=y
+CONFIG_SANDBOX_GPIO=y
+CONFIG_DM_I2C_COMPAT=y
+CONFIG_I2C_CROS_EC_TUNNEL=y
+CONFIG_I2C_CROS_EC_LDO=y
+CONFIG_DM_I2C_GPIO=y
+CONFIG_SYS_I2C_SANDBOX=y
+CONFIG_I2C_MUX=y
+CONFIG_SPL_I2C_MUX=y
+CONFIG_I2C_ARB_GPIO_CHALLENGE=y
+CONFIG_CROS_EC_KEYB=y
+CONFIG_I8042_KEYB=y
+CONFIG_LED=y
+CONFIG_LED_BLINK=y
+CONFIG_LED_GPIO=y
+CONFIG_DM_MAILBOX=y
+CONFIG_SANDBOX_MBOX=y
+CONFIG_MISC=y
+CONFIG_CROS_EC=y
+CONFIG_CROS_EC_I2C=y
+CONFIG_CROS_EC_LPC=y
+CONFIG_CROS_EC_SANDBOX=y
+CONFIG_CROS_EC_SPI=y
+CONFIG_PWRSEQ=y
+CONFIG_SPL_PWRSEQ=y
+CONFIG_I2C_EEPROM=y
+CONFIG_MMC_SANDBOX=y
+CONFIG_SPI_FLASH_SANDBOX=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DM_ETH=y
+CONFIG_NVME=y
+CONFIG_PCI=y
+CONFIG_DM_PCI=y
+CONFIG_DM_PCI_COMPAT=y
+CONFIG_PCI_SANDBOX=y
+CONFIG_PHY=y
+CONFIG_PHY_SANDBOX=y
+CONFIG_PINCTRL=y
+CONFIG_PINCONF=y
+CONFIG_PINCTRL_ROCKCHIP_RK3036=y
+CONFIG_PINCTRL_ROCKCHIP_RK3288=y
+CONFIG_PINCTRL_SANDBOX=y
+CONFIG_POWER_DOMAIN=y
+CONFIG_SANDBOX_POWER_DOMAIN=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_ACT8846=y
+CONFIG_DM_PMIC_PFUZE100=y
+CONFIG_DM_PMIC_MAX77686=y
+CONFIG_PMIC_PM8916=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_PMIC_S2MPS11=y
+CONFIG_DM_PMIC_SANDBOX=y
+CONFIG_PMIC_S5M8767=y
+CONFIG_PMIC_TPS65090=y
+CONFIG_DM_REGULATOR=y
+CONFIG_REGULATOR_ACT8846=y
+CONFIG_DM_REGULATOR_PFUZE100=y
+CONFIG_DM_REGULATOR_MAX77686=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_REGULATOR_S5M8767=y
+CONFIG_DM_REGULATOR_SANDBOX=y
+CONFIG_REGULATOR_TPS65090=y
+CONFIG_DM_PWM=y
+CONFIG_PWM_SANDBOX=y
+CONFIG_RAM=y
+CONFIG_REMOTEPROC_SANDBOX=y
+CONFIG_DM_RESET=y
+CONFIG_SANDBOX_RESET=y
+CONFIG_DM_RTC=y
+CONFIG_SANDBOX_SERIAL=y
+CONFIG_SOUND=y
+CONFIG_SOUND_SANDBOX=y
+CONFIG_SANDBOX_SPI=y
+CONFIG_SPMI=y
+CONFIG_SPMI_SANDBOX=y
+CONFIG_SYSRESET=y
+CONFIG_TIMER=y
+CONFIG_TIMER_EARLY=y
+CONFIG_SANDBOX_TIMER=y
+CONFIG_TPM_TIS_SANDBOX=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_EMUL=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_KEYBOARD=y
+CONFIG_DM_VIDEO=y
+CONFIG_CONSOLE_ROTATION=y
+CONFIG_CONSOLE_TRUETYPE=y
+CONFIG_CONSOLE_TRUETYPE_CANTORAONE=y
+CONFIG_VIDEO_SANDBOX_SDL=y
+CONFIG_WDT=y
+CONFIG_WDT_SANDBOX=y
+CONFIG_FS_CBFS=y
+CONFIG_FS_CRAMFS=y
+CONFIG_CMD_DHRYSTONE=y
+CONFIG_TPM=y
+CONFIG_LZ4=y
+CONFIG_ERRNO_STR=y
+CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_UNIT_TEST=y
+CONFIG_UT_TIME=y
+CONFIG_UT_DM=y
+CONFIG_UT_ENV=y
+CONFIG_UT_OVERLAY=y
@@ -17,7 +17,7 @@ static int simple_hello(struct udevice *dev, int ch)
{
const struct dm_demo_pdata *pdata = dev_get_platdata(dev);
- printf("Hello from %08x: %s %d\n", map_to_sysmem(dev), pdata->colour,
+ printf("Hello from %08x: %s %d\n", (uint)map_to_sysmem(dev), pdata->colour,
pdata->sides);
return 0;
@@ -24,7 +24,7 @@
typedef phys_addr_t fdt_addr_t;
typedef phys_size_t fdt_size_t;
#ifdef CONFIG_PHYS_64BIT
-#define FDT_ADDR_T_NONE (-1ULL)
+#define FDT_ADDR_T_NONE (-1U)
#define fdt_addr_to_cpu(reg) be64_to_cpu(reg)
#define fdt_size_to_cpu(reg) be64_to_cpu(reg)
typedef fdt64_t fdt_val_t;