Message ID | 20180209085755.30414-3-f4bug@amsat.org |
---|---|
State | New |
Headers | show |
Series | aspeed: simplify using the 'unimplemented device' | expand |
On Fri, 2018-02-09 at 05:57 -0300, Philippe Mathieu-Daudé wrote: > (qemu) info mtree > address-space: cpu-memory-0 > 0000000000000000-ffffffffffffffff (prio 0, i/o): system > 0000000000000000-0000000007ffffff (prio 0, rom): aspeed.boot_rom > - 000000001e600000-000000001e7fffff (prio -1, i/o): aspeed_soc.io > + 000000001e600000-000000001e7fffff (prio -1000, i/o): aspeed_soc.io > 000000001e620000-000000001e6200ff (prio 0, i/o): aspeed.smc.ast2500-fmc > 000000001e630000-000000001e6300ff (prio 0, i/o): aspeed.smc.ast2500-spi1 > 000000001e631000-000000001e6310ff (prio 0, i/o): aspeed.smc.ast2500-spi2 > > Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> > Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> > --- > include/hw/arm/aspeed_soc.h | 1 - > hw/arm/aspeed_soc.c | 32 +++----------------------------- > 2 files changed, 3 insertions(+), 30 deletions(-) > > diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h > index f26914a2b9..11ec0179db 100644 > --- a/include/hw/arm/aspeed_soc.h > +++ b/include/hw/arm/aspeed_soc.h > @@ -31,7 +31,6 @@ typedef struct AspeedSoCState { > > /*< public >*/ > ARMCPU cpu; > - MemoryRegion iomem; > MemoryRegion sram; > AspeedVICState vic; > AspeedTimerCtrlState timerctrl; > diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c > index 2a5d041b3b..30d25f8b06 100644 > --- a/hw/arm/aspeed_soc.c > +++ b/hw/arm/aspeed_soc.c > @@ -15,6 +15,7 @@ > #include "qemu-common.h" > #include "cpu.h" > #include "exec/address-spaces.h" > +#include "hw/misc/unimp.h" > #include "hw/arm/aspeed_soc.h" > #include "hw/char/serial.h" > #include "qemu/log.h" > @@ -99,31 +100,6 @@ static const AspeedSoCInfo aspeed_socs[] = { > }, > }; > > -/* > - * IO handlers: simply catch any reads/writes to IO addresses that aren't > - * handled by a device mapping. > - */ > - > -static uint64_t aspeed_soc_io_read(void *p, hwaddr offset, unsigned size) > -{ > - qemu_log_mask(LOG_UNIMP, "%s: 0x%" HWADDR_PRIx " [%u]\n", > - __func__, offset, size); > - return 0; > -} > - > -static void aspeed_soc_io_write(void *opaque, hwaddr offset, uint64_t value, > - unsigned size) > -{ > - qemu_log_mask(LOG_UNIMP, "%s: 0x%" HWADDR_PRIx " <- 0x%" PRIx64 " [%u]\n", > - __func__, offset, value, size); > -} > - > -static const MemoryRegionOps aspeed_soc_io_ops = { > - .read = aspeed_soc_io_read, > - .write = aspeed_soc_io_write, > - .endianness = DEVICE_LITTLE_ENDIAN, > -}; > - > static void aspeed_soc_init(Object *obj) > { > AspeedSoCState *s = ASPEED_SOC(obj); > @@ -199,10 +175,8 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp) > Error *err = NULL, *local_err = NULL; > > /* IO space */ > - memory_region_init_io(&s->iomem, NULL, &aspeed_soc_io_ops, NULL, > - "aspeed_soc.io", ASPEED_SOC_IOMEM_SIZE); > - memory_region_add_subregion_overlap(get_system_memory(), > - ASPEED_SOC_IOMEM_BASE, &s->iomem, -1); > + create_unimplemented_device("aspeed_soc.io", > + ASPEED_SOC_IOMEM_BASE, ASPEED_SOC_IOMEM_SIZE); > > /* CPU */ > object_property_set_bool(OBJECT(&s->cpu), true, "realized", &err);
diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h index f26914a2b9..11ec0179db 100644 --- a/include/hw/arm/aspeed_soc.h +++ b/include/hw/arm/aspeed_soc.h @@ -31,7 +31,6 @@ typedef struct AspeedSoCState { /*< public >*/ ARMCPU cpu; - MemoryRegion iomem; MemoryRegion sram; AspeedVICState vic; AspeedTimerCtrlState timerctrl; diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c index 2a5d041b3b..30d25f8b06 100644 --- a/hw/arm/aspeed_soc.c +++ b/hw/arm/aspeed_soc.c @@ -15,6 +15,7 @@ #include "qemu-common.h" #include "cpu.h" #include "exec/address-spaces.h" +#include "hw/misc/unimp.h" #include "hw/arm/aspeed_soc.h" #include "hw/char/serial.h" #include "qemu/log.h" @@ -99,31 +100,6 @@ static const AspeedSoCInfo aspeed_socs[] = { }, }; -/* - * IO handlers: simply catch any reads/writes to IO addresses that aren't - * handled by a device mapping. - */ - -static uint64_t aspeed_soc_io_read(void *p, hwaddr offset, unsigned size) -{ - qemu_log_mask(LOG_UNIMP, "%s: 0x%" HWADDR_PRIx " [%u]\n", - __func__, offset, size); - return 0; -} - -static void aspeed_soc_io_write(void *opaque, hwaddr offset, uint64_t value, - unsigned size) -{ - qemu_log_mask(LOG_UNIMP, "%s: 0x%" HWADDR_PRIx " <- 0x%" PRIx64 " [%u]\n", - __func__, offset, value, size); -} - -static const MemoryRegionOps aspeed_soc_io_ops = { - .read = aspeed_soc_io_read, - .write = aspeed_soc_io_write, - .endianness = DEVICE_LITTLE_ENDIAN, -}; - static void aspeed_soc_init(Object *obj) { AspeedSoCState *s = ASPEED_SOC(obj); @@ -199,10 +175,8 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp) Error *err = NULL, *local_err = NULL; /* IO space */ - memory_region_init_io(&s->iomem, NULL, &aspeed_soc_io_ops, NULL, - "aspeed_soc.io", ASPEED_SOC_IOMEM_SIZE); - memory_region_add_subregion_overlap(get_system_memory(), - ASPEED_SOC_IOMEM_BASE, &s->iomem, -1); + create_unimplemented_device("aspeed_soc.io", + ASPEED_SOC_IOMEM_BASE, ASPEED_SOC_IOMEM_SIZE); /* CPU */ object_property_set_bool(OBJECT(&s->cpu), true, "realized", &err);