From patchwork Tue Mar 15 21:50:26 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcelo Tosatti X-Patchwork-Id: 87095 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 1F0C1B70EC for ; Wed, 16 Mar 2011 09:04:39 +1100 (EST) Received: from localhost ([127.0.0.1]:50987 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1PzcLz-0001s5-Ub for incoming@patchwork.ozlabs.org; Tue, 15 Mar 2011 18:04:36 -0400 Received: from [140.186.70.92] (port=54803 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1PzcCG-0006IC-46 for qemu-devel@nongnu.org; Tue, 15 Mar 2011 17:56:35 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1PzcB5-0003OO-6Y for qemu-devel@nongnu.org; Tue, 15 Mar 2011 17:54:31 -0400 Received: from mx1.redhat.com ([209.132.183.28]:54473) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1PzcB4-0003O0-RQ for qemu-devel@nongnu.org; Tue, 15 Mar 2011 17:53:19 -0400 Received: from int-mx12.intmail.prod.int.phx2.redhat.com (int-mx12.intmail.prod.int.phx2.redhat.com [10.5.11.25]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id p2FLrH1G016121 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Tue, 15 Mar 2011 17:53:18 -0400 Received: from ns3.rdu.redhat.com (ns3.rdu.redhat.com [10.11.255.199]) by int-mx12.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id p2FLrHVA031630; Tue, 15 Mar 2011 17:53:17 -0400 Received: from amt.cnet (vpn1-5-191.ams2.redhat.com [10.36.5.191]) by ns3.rdu.redhat.com (8.13.8/8.13.8) with ESMTP id p2FLrFvh023455; Tue, 15 Mar 2011 17:53:16 -0400 Received: from amt.cnet (amt.cnet [127.0.0.1]) by amt.cnet (Postfix) with ESMTP id 3A5EE68A054; Tue, 15 Mar 2011 18:52:06 -0300 (BRT) Received: (from marcelo@localhost) by amt.cnet (8.14.4/8.14.4/Submit) id p2FLq2Xe002095; Tue, 15 Mar 2011 18:52:02 -0300 From: Marcelo Tosatti To: Anthony Liguori Date: Tue, 15 Mar 2011 18:50:26 -0300 Message-Id: In-Reply-To: References: X-Scanned-By: MIMEDefang 2.68 on 10.5.11.25 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 209.132.183.28 Cc: Jan Kiszka , Marcelo Tosatti , qemu-devel@nongnu.org, kvm@vger.kernel.org Subject: [Qemu-devel] [PATCH 12/35] x86: Run qemu_inject_x86_mce on target VCPU X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Jan Kiszka We will use the current TCG-only MCE injection path for KVM as well, and then this read-modify-write of the target VCPU state has to be performed synchronously in the corresponding thread. Signed-off-by: Jan Kiszka Signed-off-by: Marcelo Tosatti --- target-i386/helper.c | 87 +++++++++++++++++++++++++++++++++---------------- 1 files changed, 58 insertions(+), 29 deletions(-) diff --git a/target-i386/helper.c b/target-i386/helper.c index e3ef40c..a32960c 100644 --- a/target-i386/helper.c +++ b/target-i386/helper.c @@ -1067,29 +1067,42 @@ static void breakpoint_handler(CPUState *env) prev_debug_excp_handler(env); } -static void -qemu_inject_x86_mce(Monitor *mon, CPUState *cenv, int bank, uint64_t status, - uint64_t mcg_status, uint64_t addr, uint64_t misc, - int flags) +typedef struct MCEInjectionParams { + Monitor *mon; + CPUState *env; + int bank; + uint64_t status; + uint64_t mcg_status; + uint64_t addr; + uint64_t misc; + int flags; +} MCEInjectionParams; + +static void do_inject_x86_mce(void *data) { - uint64_t mcg_cap = cenv->mcg_cap; - uint64_t *banks = cenv->mce_banks + 4 * bank; + MCEInjectionParams *params = data; + CPUState *cenv = params->env; + uint64_t *banks = cenv->mce_banks + 4 * params->bank; + + cpu_synchronize_state(cenv); /* * If there is an MCE exception being processed, ignore this SRAO MCE * unless unconditional injection was requested. */ - if (!(flags & MCE_INJECT_UNCOND_AO) && !(status & MCI_STATUS_AR) + if (!(params->flags & MCE_INJECT_UNCOND_AO) + && !(params->status & MCI_STATUS_AR) && (cenv->mcg_status & MCG_STATUS_MCIP)) { return; } - if (status & MCI_STATUS_UC) { + + if (params->status & MCI_STATUS_UC) { /* * if MSR_MCG_CTL is not all 1s, the uncorrected error * reporting is disabled */ - if ((mcg_cap & MCG_CTL_P) && cenv->mcg_ctl != ~(uint64_t)0) { - monitor_printf(mon, + if ((cenv->mcg_cap & MCG_CTL_P) && cenv->mcg_ctl != ~(uint64_t)0) { + monitor_printf(params->mon, "CPU %d: Uncorrected error reporting disabled\n", cenv->cpu_index); return; @@ -1100,35 +1113,39 @@ qemu_inject_x86_mce(Monitor *mon, CPUState *cenv, int bank, uint64_t status, * reporting is disabled for the bank */ if (banks[0] != ~(uint64_t)0) { - monitor_printf(mon, "CPU %d: Uncorrected error reporting disabled " - "for bank %d\n", cenv->cpu_index, bank); + monitor_printf(params->mon, + "CPU %d: Uncorrected error reporting disabled for" + " bank %d\n", + cenv->cpu_index, params->bank); return; } if ((cenv->mcg_status & MCG_STATUS_MCIP) || !(cenv->cr[4] & CR4_MCE_MASK)) { - monitor_printf(mon, "CPU %d: Previous MCE still in progress, " - "raising triple fault\n", cenv->cpu_index); + monitor_printf(params->mon, + "CPU %d: Previous MCE still in progress, raising" + " triple fault\n", + cenv->cpu_index); qemu_log_mask(CPU_LOG_RESET, "Triple fault\n"); qemu_system_reset_request(); return; } if (banks[1] & MCI_STATUS_VAL) { - status |= MCI_STATUS_OVER; + params->status |= MCI_STATUS_OVER; } - banks[2] = addr; - banks[3] = misc; - cenv->mcg_status = mcg_status; - banks[1] = status; + banks[2] = params->addr; + banks[3] = params->misc; + cenv->mcg_status = params->mcg_status; + banks[1] = params->status; cpu_interrupt(cenv, CPU_INTERRUPT_MCE); } else if (!(banks[1] & MCI_STATUS_VAL) || !(banks[1] & MCI_STATUS_UC)) { if (banks[1] & MCI_STATUS_VAL) { - status |= MCI_STATUS_OVER; + params->status |= MCI_STATUS_OVER; } - banks[2] = addr; - banks[3] = misc; - banks[1] = status; + banks[2] = params->addr; + banks[3] = params->misc; + banks[1] = params->status; } else { banks[1] |= MCI_STATUS_OVER; } @@ -1138,6 +1155,16 @@ void cpu_x86_inject_mce(Monitor *mon, CPUState *cenv, int bank, uint64_t status, uint64_t mcg_status, uint64_t addr, uint64_t misc, int flags) { + MCEInjectionParams params = { + .mon = mon, + .env = cenv, + .bank = bank, + .status = status, + .mcg_status = mcg_status, + .addr = addr, + .misc = misc, + .flags = flags, + }; unsigned bank_num = cenv->mcg_cap & 0xff; CPUState *env; int flag = 0; @@ -1167,17 +1194,19 @@ void cpu_x86_inject_mce(Monitor *mon, CPUState *cenv, int bank, kvm_inject_x86_mce(cenv, bank, status, mcg_status, addr, misc, flag); } else { - qemu_inject_x86_mce(mon, cenv, bank, status, mcg_status, addr, misc, - flags); + run_on_cpu(cenv, do_inject_x86_mce, ¶ms); if (flags & MCE_INJECT_BROADCAST) { + params.bank = 1; + params.status = MCI_STATUS_VAL | MCI_STATUS_UC; + params.mcg_status = MCG_STATUS_MCIP | MCG_STATUS_RIPV; + params.addr = 0; + params.misc = 0; for (env = first_cpu; env != NULL; env = env->next_cpu) { if (cenv == env) { continue; } - qemu_inject_x86_mce(mon, env, 1, - MCI_STATUS_VAL | MCI_STATUS_UC, - MCG_STATUS_MCIP | MCG_STATUS_RIPV, 0, 0, - flags); + params.env = env; + run_on_cpu(cenv, do_inject_x86_mce, ¶ms); } } }