From patchwork Thu Feb 8 12:33:46 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Niklas Cassel X-Patchwork-Id: 870864 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3zcd1c4M4Hz9sP9 for ; Thu, 8 Feb 2018 23:34:44 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752267AbeBHMeM (ORCPT ); Thu, 8 Feb 2018 07:34:12 -0500 Received: from bastet.se.axis.com ([195.60.68.11]:49137 "EHLO bastet.se.axis.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752255AbeBHMeK (ORCPT ); Thu, 8 Feb 2018 07:34:10 -0500 Received: from localhost (localhost [127.0.0.1]) by bastet.se.axis.com (Postfix) with ESMTP id 17A651889F; Thu, 8 Feb 2018 13:34:09 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at bastet.se.axis.com Received: from bastet.se.axis.com ([IPv6:::ffff:127.0.0.1]) by localhost (bastet.se.axis.com [::ffff:127.0.0.1]) (amavisd-new, port 10024) with LMTP id 6BoJ0Tla33n7; Thu, 8 Feb 2018 13:34:08 +0100 (CET) Received: from boulder02.se.axis.com (boulder02.se.axis.com [10.0.8.16]) by bastet.se.axis.com (Postfix) with ESMTPS id 7152B188A5; Thu, 8 Feb 2018 13:34:08 +0100 (CET) Received: from boulder02.se.axis.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 3465F1A06F; Thu, 8 Feb 2018 13:34:08 +0100 (CET) Received: from boulder02.se.axis.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 291F71A073; Thu, 8 Feb 2018 13:34:08 +0100 (CET) Received: from seth.se.axis.com (unknown [10.0.2.172]) by boulder02.se.axis.com (Postfix) with ESMTP; Thu, 8 Feb 2018 13:34:08 +0100 (CET) Received: from lnxartpec1.se.axis.com (lnxartpec1.se.axis.com [10.88.4.10]) by seth.se.axis.com (Postfix) with ESMTP id 1D06A2D60; Thu, 8 Feb 2018 13:34:08 +0100 (CET) Received: by lnxartpec1.se.axis.com (Postfix, from userid 20283) id 185DD401B8; Thu, 8 Feb 2018 13:34:07 +0100 (CET) From: Niklas Cassel To: kishon@ti.com, Jingoo Han , Joao Pinto , Lorenzo Pieralisi , Bjorn Helgaas Cc: Niklas Cassel , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 3/3] PCI: designware-ep: Return an error when requesting a too large BAR size Date: Thu, 8 Feb 2018 13:33:46 +0100 Message-Id: <20180208123346.20784-4-niklas.cassel@axis.com> X-Mailer: git-send-email 2.14.2 In-Reply-To: <20180208123346.20784-1-niklas.cassel@axis.com> References: <20180208123346.20784-1-niklas.cassel@axis.com> X-TM-AS-GCONF: 00 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org pci_epc_set_bar() can be called with flag PCI_BASE_ADDRESS_MEM_TYPE_64, and can thus request a BAR size larger than 4 GB. However, the pcie-designware-ep.c driver currently doesn't handle BAR sizes larger than 4 GB. (Since we are only writing the BAR_mask[x] register and not the BAR_mask[x+1] register.) For now, return an error when requesting a BAR size larger than 4 GB. Signed-off-by: Niklas Cassel --- Changes since v1: Use upper_32_bits() to avoid build warning on systems with 32-bit size_t. drivers/pci/dwc/pcie-designware-ep.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/pci/dwc/pcie-designware-ep.c b/drivers/pci/dwc/pcie-designware-ep.c index 3a6feeff5f5b..efb65a7c06b8 100644 --- a/drivers/pci/dwc/pcie-designware-ep.c +++ b/drivers/pci/dwc/pcie-designware-ep.c @@ -126,6 +126,11 @@ static int dw_pcie_ep_set_bar(struct pci_epc *epc, u8 func_no, enum dw_pcie_as_type as_type; u32 reg = PCI_BASE_ADDRESS_0 + (4 * bar); + if (upper_32_bits(size)) { + dev_err(pci->dev, "can't handle BAR larger than 4GB\n"); + return -EINVAL; + } + if (!(flags & PCI_BASE_ADDRESS_SPACE)) as_type = DW_PCIE_AS_MEM; else