| Message ID | 20110315071638.GA16254@gandalf.sssup.it |
|---|---|
| State | Accepted |
| Commit | 67a490d60d70f2b01d55976440ba30154af96965 |
| Delegated to: | Scott Wood |
| Headers | show |
On Mon, Mar 14, 2011 at 09:16:38PM -0000, michael wrote: > atmel_nand: don't require CONFIG_SYS_NAND_ENABLE_PIN > If NCE is hooked up to NCS3, we don't need to (and can't) > explicitly set the state of the NCE pin. Instead, the > controller asserts it automatically as part of a > command/data access. Only "CE don't care"-type NAND chips > can be used in this manner. > > Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> > Cc: Scott Wood <scottwood@freescale.com> > Cc: Reinhard Meyer <u-boot@emk-elektronik.de> > > --- > Change since V1 > - add a better description > Change since V2: > - change commit message Applied to u-boot-nand-flash next, with the subject line fixed as in this e-mail. -Scott
diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c index ab8bbb3..818d362 100644 --- a/drivers/mtd/nand/atmel_nand.c +++ b/drivers/mtd/nand/atmel_nand.c @@ -249,8 +249,10 @@ static void at91_nand_hwcontrol(struct mtd_info *mtd, if (ctrl & NAND_ALE) IO_ADDR_W |= CONFIG_SYS_NAND_MASK_ALE; +#ifdef CONFIG_SYS_NAND_ENABLE_PIN at91_set_gpio_value(CONFIG_SYS_NAND_ENABLE_PIN, !(ctrl & NAND_NCE)); +#endif this->IO_ADDR_W = (void *) IO_ADDR_W; }
atmel_nand: don't require CONFIG_SYS_NAND_ENABLE_PIN If NCE is hooked up to NCS3, we don't need to (and can't) explicitly set the state of the NCE pin. Instead, the controller asserts it automatically as part of a command/data access. Only "CE don't care"-type NAND chips can be used in this manner. Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Reinhard Meyer <u-boot@emk-elektronik.de> --- Change since V1 - add a better description Change since V2: - change commit message