asm/head: use HSRR exception registers in FIXUP_ENDIAN

Message ID 20180203042821.28181-1-npiggin@gmail.com
State New
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Series
  • asm/head: use HSRR exception registers in FIXUP_ENDIAN
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Commit Message

Nicholas Piggin Feb. 3, 2018, 4:28 a.m.
Taken from the Linux FIXUP_ENDIAN_HV macro, use the HSRR registers in
FIXUP_ENDIAN. This allows the 0x100 exception handler (the single user
of the macro) to preserve SRR registers and potentially recover, debug,
or do something useful with them.

This also allows the maco to be used in code with MSR[RI]=1, if the need
arises.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
 asm/head.S | 23 ++++++++++++-----------
 1 file changed, 12 insertions(+), 11 deletions(-)

Patch

diff --git a/asm/head.S b/asm/head.S
index 264899b12..fc6cd109f 100644
--- a/asm/head.S
+++ b/asm/head.S
@@ -467,17 +467,18 @@  call_relocate:
 1:	/* Fatal relocate failure */
 	attn
 
-#define FIXUP_ENDIAN                                              \
-       tdi   0,0,0x48;   /* Reverse endian of b . + 8          */ \
-       b     $+36;       /* Skip trampoline if endian is good  */ \
-       .long 0x05009f42; /* bcl 20,31,$+4                      */ \
-       .long 0xa602487d; /* mflr r10                           */ \
-       .long 0x1c004a39; /* addi r10,r10,28                    */ \
-       .long 0xa600607d; /* mfmsr r11                          */ \
-       .long 0x01006b69; /* xori r11,r11,1                     */ \
-       .long 0xa6035a7d; /* mtsrr0 r10                         */ \
-       .long 0xa6037b7d; /* mtsrr1 r11                         */ \
-       .long 0x2400004c  /* rfid                               */
+#define FIXUP_ENDIAN						   \
+	tdi   0,0,0x48;	  /* Reverse endian of b . + 8		*/ \
+	b     191f;	  /* Skip trampoline if endian is good	*/ \
+	.long 0xa600607d; /* mfmsr r11				*/ \
+	.long 0x01006b69; /* xori r11,r11,1			*/ \
+	.long 0x05009f42; /* bcl 20,31,$+4			*/ \
+	.long 0xa602487d; /* mflr r10				*/ \
+	.long 0x14004a39; /* addi r10,r10,20			*/ \
+	.long 0xa64b5a7d; /* mthsrr0 r10			*/ \
+	.long 0xa64b7b7d; /* mthsrr1 r11			*/ \
+	.long 0x2402004c; /* hrfid				*/ \
+191:
 
 pm_save_regs:
 	SAVE_GPR(2,%r1)