Message ID | 1300160443-12552-6-git-send-email-leiwen@marvell.com |
---|---|
State | Superseded |
Headers | show |
Hello Lei, Lei Wen wrote: > Signed-off-by: Lei Wen <leiwen@marvell.com> > --- > arch/arm/cpu/arm926ejs/armada100/cpu.c | 14 ++++++++++++++ > arch/arm/include/asm/arch-armada100/mfp.h | 4 ++++ > board/Marvell/aspenite/aspenite.c | 5 +++++ > include/configs/aspenite.h | 12 ++++++++++++ > 4 files changed, 35 insertions(+), 0 deletions(-) > > diff --git a/arch/arm/cpu/arm926ejs/armada100/cpu.c b/arch/arm/cpu/arm926ejs/armada100/cpu.c > index 62aa175..8039ad2 100644 > --- a/arch/arm/cpu/arm926ejs/armada100/cpu.c > +++ b/arch/arm/cpu/arm926ejs/armada100/cpu.c > @@ -62,6 +62,14 @@ int arch_cpu_init(void) > /* Enable GPIO clock */ > writel(APBC_APBCLK, &apb1clkres->gpio); > > + /* Enable general I2C clock */ > + writel(APBC_RST | APBC_FNCLK | APBC_APBCLK, &apb1clkres->twsi0); > + writel(APBC_FNCLK | APBC_APBCLK, &apb1clkres->twsi0); > + > + /* Enable power I2C clock */ > + writel(APBC_RST | APBC_FNCLK | APBC_APBCLK, &apb1clkres->twsi1); > + writel(APBC_FNCLK | APBC_APBCLK, &apb1clkres->twsi1); > + If boards based on this cpu type don;t use i2c, i2c clock and power would be enabled ... wouldn;t it be better, if we enable this only if CONFIG_I2C_MV is defined? Hmm.. are the comments OK? In the first "block" you only use twsi0 register, in the second "block" only twsi1 ...? > /* > * Enable Functional and APB clock at 14.7456MHz > * for configured UART console > @@ -90,3 +98,9 @@ int print_cpuinfo(void) > return 0; > } > #endif > + > +#ifdef CONFIG_I2C_MV > +void i2c_clk_enable (void) > +{ > +} > +#endif > diff --git a/arch/arm/include/asm/arch-armada100/mfp.h b/arch/arm/include/asm/arch-armada100/mfp.h > index d21a79f..f22b5e7 100644 > --- a/arch/arm/include/asm/arch-armada100/mfp.h > +++ b/arch/arm/include/asm/arch-armada100/mfp.h > @@ -60,6 +60,10 @@ > #define MFPO8_UART3_RXD MFP_REG(0x06c) | MFP_AF2 | MFP_DRIVE_MEDIUM > #define MFPO9_UART3_TXD MFP_REG(0x070) | MFP_AF2 | MFP_DRIVE_MEDIUM > > +/* I2c */ > +#define MFP105_CI2C_SDA MFP_REG(0x1a4) | MFP_AF1 | MFP_DRIVE_MEDIUM > +#define MFP106_CI2C_SCL MFP_REG(0x1a8) | MFP_AF1 | MFP_DRIVE_MEDIUM > + Please add braces around this multiple or concatenation > /* More macros can be defined here... */ > > #define MFP_PIN_MAX 117 > diff --git a/board/Marvell/aspenite/aspenite.c b/board/Marvell/aspenite/aspenite.c > index 046ffd6..34ac7aa 100644 > --- a/board/Marvell/aspenite/aspenite.c > +++ b/board/Marvell/aspenite/aspenite.c > @@ -33,9 +33,14 @@ DECLARE_GLOBAL_DATA_PTR; > int board_early_init_f(void) > { > u32 mfp_cfg[] = { > + /* I2C */ > + MFP105_CI2C_SDA, > + MFP106_CI2C_SCL, > + > /* Enable Console on UART1 */ > MFP107_UART1_RXD, > MFP108_UART1_TXD, > + > MFP_EOC /*End of configureation*/ > }; > /* configure MFP's */ > diff --git a/include/configs/aspenite.h b/include/configs/aspenite.h > index fd35f3e..50f8ed7 100644 > --- a/include/configs/aspenite.h > +++ b/include/configs/aspenite.h > @@ -63,6 +63,18 @@ > #undef CONFIG_ARCH_MISC_INIT > > /* > + * I2C definition > + */ > +#define CONFIG_CMD_I2C 1 > +#define CONFIG_I2C_MV 1 > +#define CONFIG_PXA_I2C_NUM 2 > +#define CONFIG_I2C_MULTI_BUS 1 > +#define CONFIG_PXA_I2C_REG {0xd4011000, 0xd4025000} > +#define CONFIG_HARD_I2C 1 > +#define CONFIG_SYS_I2C_SPEED 0 > +#define CONFIG_SYS_I2C_SLAVE 0xfe > + > +/* > * Environment variables configurations > */ > #define CONFIG_ENV_IS_NOWHERE 1 /* if env in SDRAM */ Thanks! bye, Heiko
Hi Heiko, On Tue, Mar 15, 2011 at 3:08 PM, Heiko Schocher <heiko.schocher@invitel.hu> wrote: > Hello Lei, > > Lei Wen wrote: >> Signed-off-by: Lei Wen <leiwen@marvell.com> >> --- >> arch/arm/cpu/arm926ejs/armada100/cpu.c | 14 ++++++++++++++ >> arch/arm/include/asm/arch-armada100/mfp.h | 4 ++++ >> board/Marvell/aspenite/aspenite.c | 5 +++++ >> include/configs/aspenite.h | 12 ++++++++++++ >> 4 files changed, 35 insertions(+), 0 deletions(-) >> >> diff --git a/arch/arm/cpu/arm926ejs/armada100/cpu.c b/arch/arm/cpu/arm926ejs/armada100/cpu.c >> index 62aa175..8039ad2 100644 >> --- a/arch/arm/cpu/arm926ejs/armada100/cpu.c >> +++ b/arch/arm/cpu/arm926ejs/armada100/cpu.c >> @@ -62,6 +62,14 @@ int arch_cpu_init(void) >> /* Enable GPIO clock */ >> writel(APBC_APBCLK, &apb1clkres->gpio); >> >> + /* Enable general I2C clock */ >> + writel(APBC_RST | APBC_FNCLK | APBC_APBCLK, &apb1clkres->twsi0); >> + writel(APBC_FNCLK | APBC_APBCLK, &apb1clkres->twsi0); >> + >> + /* Enable power I2C clock */ >> + writel(APBC_RST | APBC_FNCLK | APBC_APBCLK, &apb1clkres->twsi1); >> + writel(APBC_FNCLK | APBC_APBCLK, &apb1clkres->twsi1); >> + > > If boards based on this cpu type don;t use i2c, i2c clock and > power would be enabled ... wouldn;t it be better, if we enable > this only if CONFIG_I2C_MV is defined? Good point, I would modify to follow this. > > Hmm.. are the comments OK? In the first "block" you only > use twsi0 register, in the second "block" only twsi1 ...? The comments is following what the spec says... In spec, the twsi0 named as general, and twsi1 named as power one. Thanks for reviewing! Best regards, Lei
Hello Lei, Lei Wen wrote: > On Tue, Mar 15, 2011 at 3:08 PM, Heiko Schocher > <heiko.schocher@invitel.hu> wrote: >> Hello Lei, >> >> Lei Wen wrote: >>> Signed-off-by: Lei Wen <leiwen@marvell.com> >>> --- >>> arch/arm/cpu/arm926ejs/armada100/cpu.c | 14 ++++++++++++++ >>> arch/arm/include/asm/arch-armada100/mfp.h | 4 ++++ >>> board/Marvell/aspenite/aspenite.c | 5 +++++ >>> include/configs/aspenite.h | 12 ++++++++++++ >>> 4 files changed, 35 insertions(+), 0 deletions(-) >>> >>> diff --git a/arch/arm/cpu/arm926ejs/armada100/cpu.c b/arch/arm/cpu/arm926ejs/armada100/cpu.c >>> index 62aa175..8039ad2 100644 >>> --- a/arch/arm/cpu/arm926ejs/armada100/cpu.c >>> +++ b/arch/arm/cpu/arm926ejs/armada100/cpu.c >>> @@ -62,6 +62,14 @@ int arch_cpu_init(void) >>> /* Enable GPIO clock */ >>> writel(APBC_APBCLK, &apb1clkres->gpio); >>> >>> + /* Enable general I2C clock */ >>> + writel(APBC_RST | APBC_FNCLK | APBC_APBCLK, &apb1clkres->twsi0); >>> + writel(APBC_FNCLK | APBC_APBCLK, &apb1clkres->twsi0); >>> + >>> + /* Enable power I2C clock */ >>> + writel(APBC_RST | APBC_FNCLK | APBC_APBCLK, &apb1clkres->twsi1); >>> + writel(APBC_FNCLK | APBC_APBCLK, &apb1clkres->twsi1); >>> + >> If boards based on this cpu type don;t use i2c, i2c clock and >> power would be enabled ... wouldn;t it be better, if we enable >> this only if CONFIG_I2C_MV is defined? > > Good point, I would modify to follow this. > >> Hmm.. are the comments OK? In the first "block" you only >> use twsi0 register, in the second "block" only twsi1 ...? > > The comments is following what the spec says... > In spec, the twsi0 named as general, and twsi1 named as power one. Ah, ok. So the names in the struct are misleading. bye, Heiko
diff --git a/arch/arm/cpu/arm926ejs/armada100/cpu.c b/arch/arm/cpu/arm926ejs/armada100/cpu.c index 62aa175..8039ad2 100644 --- a/arch/arm/cpu/arm926ejs/armada100/cpu.c +++ b/arch/arm/cpu/arm926ejs/armada100/cpu.c @@ -62,6 +62,14 @@ int arch_cpu_init(void) /* Enable GPIO clock */ writel(APBC_APBCLK, &apb1clkres->gpio); + /* Enable general I2C clock */ + writel(APBC_RST | APBC_FNCLK | APBC_APBCLK, &apb1clkres->twsi0); + writel(APBC_FNCLK | APBC_APBCLK, &apb1clkres->twsi0); + + /* Enable power I2C clock */ + writel(APBC_RST | APBC_FNCLK | APBC_APBCLK, &apb1clkres->twsi1); + writel(APBC_FNCLK | APBC_APBCLK, &apb1clkres->twsi1); + /* * Enable Functional and APB clock at 14.7456MHz * for configured UART console @@ -90,3 +98,9 @@ int print_cpuinfo(void) return 0; } #endif + +#ifdef CONFIG_I2C_MV +void i2c_clk_enable (void) +{ +} +#endif diff --git a/arch/arm/include/asm/arch-armada100/mfp.h b/arch/arm/include/asm/arch-armada100/mfp.h index d21a79f..f22b5e7 100644 --- a/arch/arm/include/asm/arch-armada100/mfp.h +++ b/arch/arm/include/asm/arch-armada100/mfp.h @@ -60,6 +60,10 @@ #define MFPO8_UART3_RXD MFP_REG(0x06c) | MFP_AF2 | MFP_DRIVE_MEDIUM #define MFPO9_UART3_TXD MFP_REG(0x070) | MFP_AF2 | MFP_DRIVE_MEDIUM +/* I2c */ +#define MFP105_CI2C_SDA MFP_REG(0x1a4) | MFP_AF1 | MFP_DRIVE_MEDIUM +#define MFP106_CI2C_SCL MFP_REG(0x1a8) | MFP_AF1 | MFP_DRIVE_MEDIUM + /* More macros can be defined here... */ #define MFP_PIN_MAX 117 diff --git a/board/Marvell/aspenite/aspenite.c b/board/Marvell/aspenite/aspenite.c index 046ffd6..34ac7aa 100644 --- a/board/Marvell/aspenite/aspenite.c +++ b/board/Marvell/aspenite/aspenite.c @@ -33,9 +33,14 @@ DECLARE_GLOBAL_DATA_PTR; int board_early_init_f(void) { u32 mfp_cfg[] = { + /* I2C */ + MFP105_CI2C_SDA, + MFP106_CI2C_SCL, + /* Enable Console on UART1 */ MFP107_UART1_RXD, MFP108_UART1_TXD, + MFP_EOC /*End of configureation*/ }; /* configure MFP's */ diff --git a/include/configs/aspenite.h b/include/configs/aspenite.h index fd35f3e..50f8ed7 100644 --- a/include/configs/aspenite.h +++ b/include/configs/aspenite.h @@ -63,6 +63,18 @@ #undef CONFIG_ARCH_MISC_INIT /* + * I2C definition + */ +#define CONFIG_CMD_I2C 1 +#define CONFIG_I2C_MV 1 +#define CONFIG_PXA_I2C_NUM 2 +#define CONFIG_I2C_MULTI_BUS 1 +#define CONFIG_PXA_I2C_REG {0xd4011000, 0xd4025000} +#define CONFIG_HARD_I2C 1 +#define CONFIG_SYS_I2C_SPEED 0 +#define CONFIG_SYS_I2C_SLAVE 0xfe + +/* * Environment variables configurations */ #define CONFIG_ENV_IS_NOWHERE 1 /* if env in SDRAM */
Signed-off-by: Lei Wen <leiwen@marvell.com> --- arch/arm/cpu/arm926ejs/armada100/cpu.c | 14 ++++++++++++++ arch/arm/include/asm/arch-armada100/mfp.h | 4 ++++ board/Marvell/aspenite/aspenite.c | 5 +++++ include/configs/aspenite.h | 12 ++++++++++++ 4 files changed, 35 insertions(+), 0 deletions(-)