| Message ID | 1517494776-2816-1-git-send-email-prabhakar.kushwaha@nxp.com |
|---|---|
| State | Changes Requested |
| Delegated to: | Cyrille Pitchen |
| Headers | show |
| Series | mtd: spi-nor: Add support of Sector Map Parameter Table | expand |
Hi Prabhakar, Le 01/02/2018 à 15:19, Prabhakar Kushwaha a écrit : > Read Any Register and Write Any Register commands provides a way to > read or write all device registers - non-volatile and volatile. > These commands are followed by a 3- or 4-byte address, followed by > a number of latency (dummy) cycles set by volatile configuration > registers. Then the selected register contents are returned or written. > > This patch update quadspi controller driver to implement above behavior. > > Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> > --- > drivers/mtd/spi-nor/fsl-quadspi.c | 18 ++++++++++++++++++ > 1 file changed, 18 insertions(+) > > diff --git a/drivers/mtd/spi-nor/fsl-quadspi.c b/drivers/mtd/spi-nor/fsl-quadspi.c > index 2e44234..87f87ed 100644 > --- a/drivers/mtd/spi-nor/fsl-quadspi.c > +++ b/drivers/mtd/spi-nor/fsl-quadspi.c > @@ -893,6 +893,22 @@ static int fsl_qspi_write_reg(struct spi_nor *nor, u8 opcode, u8 *buf, int len) > return ret; > } > > +static int fsl_qspi_read_anyreg(struct spi_nor *nor, u8 opcode, u32 offset, > + u8 *buf, int len) > +{ > + /* TODO: It will be updated during controller changes*/ > + I guess new handlers should be added at the same time they are implemented. Best regards, Cyrille > + return 0; > +} > + > +static int fsl_qspi_write_anyreg(struct spi_nor *nor, u8 opcode, u32 offset, > + u8 *buf, int len) > +{ > + /* TODO: It will be updated during controller changes*/ > + > + return 0; > +} > + > static ssize_t fsl_qspi_write(struct spi_nor *nor, loff_t to, > size_t len, const u_char *buf) > { > @@ -1100,6 +1116,8 @@ static int fsl_qspi_probe(struct platform_device *pdev) > /* fill the hooks */ > nor->read_reg = fsl_qspi_read_reg; > nor->write_reg = fsl_qspi_write_reg; > + nor->read_anyreg = fsl_qspi_read_anyreg; > + nor->write_anyreg = fsl_qspi_write_anyreg; > nor->read = fsl_qspi_read; > nor->write = fsl_qspi_write; > nor->erase = fsl_qspi_erase; >
diff --git a/drivers/mtd/spi-nor/fsl-quadspi.c b/drivers/mtd/spi-nor/fsl-quadspi.c index 2e44234..87f87ed 100644 --- a/drivers/mtd/spi-nor/fsl-quadspi.c +++ b/drivers/mtd/spi-nor/fsl-quadspi.c @@ -893,6 +893,22 @@ static int fsl_qspi_write_reg(struct spi_nor *nor, u8 opcode, u8 *buf, int len) return ret; } +static int fsl_qspi_read_anyreg(struct spi_nor *nor, u8 opcode, u32 offset, + u8 *buf, int len) +{ + /* TODO: It will be updated during controller changes*/ + + return 0; +} + +static int fsl_qspi_write_anyreg(struct spi_nor *nor, u8 opcode, u32 offset, + u8 *buf, int len) +{ + /* TODO: It will be updated during controller changes*/ + + return 0; +} + static ssize_t fsl_qspi_write(struct spi_nor *nor, loff_t to, size_t len, const u_char *buf) { @@ -1100,6 +1116,8 @@ static int fsl_qspi_probe(struct platform_device *pdev) /* fill the hooks */ nor->read_reg = fsl_qspi_read_reg; nor->write_reg = fsl_qspi_write_reg; + nor->read_anyreg = fsl_qspi_read_anyreg; + nor->write_anyreg = fsl_qspi_write_anyreg; nor->read = fsl_qspi_read; nor->write = fsl_qspi_write; nor->erase = fsl_qspi_erase;
Read Any Register and Write Any Register commands provides a way to read or write all device registers - non-volatile and volatile. These commands are followed by a 3- or 4-byte address, followed by a number of latency (dummy) cycles set by volatile configuration registers. Then the selected register contents are returned or written. This patch update quadspi controller driver to implement above behavior. Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> --- drivers/mtd/spi-nor/fsl-quadspi.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+)