diff mbox series

[U-Boot] net/phy/cortina: Add No firmware upload option

Message ID 1517294468-13433-1-git-send-email-priyanka.jain@nxp.com
State Accepted
Commit b321c44ac9e2569fcc07def3e150fcfe4554a1b0
Delegated to: Joe Hershberger
Headers show
Series [U-Boot] net/phy/cortina: Add No firmware upload option | expand

Commit Message

Priyanka Jain Jan. 30, 2018, 6:41 a.m. UTC 
Current Cortina phy driver assumes that firmware upload
is required during initialization and is dependent
on presence of corresponding macros like CONFIG_CORTINA_FW_ADDR
for compilation.

But Cortina phy has provision to store phy firmware in
attached dedicated EEPROM. And boards designed with such
EEPROM does not require firmware upload.

Add CORTINA_NO_FW_UPLOAD option in cortina.c to support
such boards.

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
---
 drivers/net/phy/cortina.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)

Comments

Joe Hershberger March 19, 2018, 9:09 p.m. UTC | #1 
On Tue, Jan 30, 2018 at 12:41 AM, Priyanka Jain <priyanka.jain@nxp.com> wrote:
> Current Cortina phy driver assumes that firmware upload
> is required during initialization and is dependent
> on presence of corresponding macros like CONFIG_CORTINA_FW_ADDR
> for compilation.
>
> But Cortina phy has provision to store phy firmware in
> attached dedicated EEPROM. And boards designed with such
> EEPROM does not require firmware upload.
>
> Add CORTINA_NO_FW_UPLOAD option in cortina.c to support
> such boards.
>
> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>

Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Joe Hershberger March 26, 2018, 7:26 p.m. UTC | #2 
Hi Priyanka,

https://patchwork.ozlabs.org/patch/867408/ was applied to http://git.denx.de/?p=u-boot/u-boot-net.git

Thanks!
-Joe
diff mbox series

Patch

diff --git a/drivers/net/phy/cortina.c b/drivers/net/phy/cortina.c
index 3ac833d..a6b4754 100644
--- a/drivers/net/phy/cortina.c
+++ b/drivers/net/phy/cortina.c
@@ -4,6 +4,7 @@ 
  * SPDX-License-Identifier:     GPL-2.0+
  *
  * Copyright 2014 Freescale Semiconductor, Inc.
+ * Copyright 2018 NXP
  *
  */
 
@@ -27,6 +28,7 @@ 
 #error The Cortina PHY needs 10G support
 #endif
 
+#ifndef CORTINA_NO_FW_UPLOAD
 struct cortina_reg_config cortina_reg_cfg[] = {
 	/* CS4315_enable_sr_mode */
 	{VILLA_GLOBAL_MSEQCLKCTRL, 0x8004},
@@ -215,12 +217,22 @@  void cs4340_upload_firmware(struct phy_device *phydev)
 		phy_write(phydev, 0x00, fw_temp.reg_addr, fw_temp.reg_value);
 	}
 }
+#endif
 
 int cs4340_phy_init(struct phy_device *phydev)
 {
+#ifndef CORTINA_NO_FW_UPLOAD
 	int timeout = 100;  /* 100ms */
+#endif
 	int reg_value;
 
+	/*
+	 * Cortina phy has provision to store
+	 * phy firmware in attached dedicated EEPROM.
+	 * Boards designed with EEPROM attached to Cortina
+	 * does not require FW upload.
+	 */
+#ifndef CORTINA_NO_FW_UPLOAD
 	/* step1: BIST test */
 	phy_write(phydev, 0x00, VILLA_GLOBAL_MSEQCLKCTRL,     0x0004);
 	phy_write(phydev, 0x00, VILLA_GLOBAL_LINE_SOFT_RESET, 0x0000);
@@ -241,6 +253,7 @@  int cs4340_phy_init(struct phy_device *phydev)
 
 	/* setp2: upload ucode */
 	cs4340_upload_firmware(phydev);
+#endif
 	reg_value = phy_read(phydev, 0x00, VILLA_GLOBAL_DWNLD_CHECKSUM_STATUS);
 	if (reg_value) {
 		debug("%s checksum status failed.\n", __func__);