Comments
Patch
@@ -54,6 +54,7 @@ extern struct sparc_irq_config sparc_irq_config;
unsigned int irq_alloc(unsigned int real_irq, unsigned int pil);
void irq_link(unsigned int irq);
+void irq_unlink(unsigned int irq);
void handler_irq(unsigned int pil, struct pt_regs *regs);
/* Dave Redman (djhr@tadpole.co.uk)
@@ -105,12 +105,12 @@ EXPORT_SYMBOL(arch_local_irq_restore);
* Sun4d complicates things even further. IRQ numbers are arbitrary
* 32-bit values in that case. Since this is similar to sparc64,
* we adopt a virtual IRQ numbering scheme as is done there.
- * Virutal interrupt numbers are allocated by build_irq(). So NR_IRQS
+ * Virtual interrupt numbers are allocated by build_irq(). So NR_IRQS
* just becomes a limit of how many interrupt sources we can handle in
* a single system. Even fully loaded SS2000 machines top off at
* about 32 interrupt sources or so, therefore a NR_IRQS value of 64
* is more than enough.
- *
+ *
* We keep a map of per-PIL enable interrupts. These get wired
* up via the irq_chip->startup() method which gets invoked by
* the generic IRQ layer during request_irq().
@@ -135,9 +135,13 @@ unsigned int irq_alloc(unsigned int real_irq,
unsigned int pil)
return i;
}
- for (i = 1; i < NR_IRQS; i++) {
- if (!irq_table[i].irq)
- break;
+ if (real_irq < NR_IRQS && irq_table[real_irq].irq == 0) {
+ i = real_irq;
+ } else {
+ for (i = 1; i < NR_IRQS; i++) {
+ if (!irq_table[i].irq)
+ break;
+ }
}