Patchwork [x32] PATCH: Only allow *movabs<mode>_[1|2] for TARGET_LP64

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Submitter H.J. Lu
Date March 12, 2011, 3:30 p.m.
Message ID <20110312153000.GA3917@intel.com>
Download mbox | patch
Permalink /patch/86520/
State New
Headers show

Comments

H.J. Lu - March 12, 2011, 3:30 p.m.
Hi,

x32 is limited to 32bit address space.  I checked in this patc to
only allow *movabs<mode>_[1|2] for TARGET_LP64.

H.J.
---
commit 2ea3bfe6d0b96ad15e801d29fd28817138e93456
Author: H.J. Lu <hjl.tools@gmail.com>
Date:   Fri Mar 11 13:36:42 2011 -0800

    Only allow *movabs<mode>_[1|2] for TARGET_LP64.

Patch

diff --git a/gcc/ChangeLog.x32 b/gcc/ChangeLog.x32
index ac312af..0206c86 100644
--- a/gcc/ChangeLog.x32
+++ b/gcc/ChangeLog.x32
@@ -1,5 +1,11 @@ 
 2011-03-11  H.J. Lu  <hongjiu.lu@intel.com>
 
+	* config/i386/i386.md (*movabs<mode>_1): Only allow for
+	TARGET_LP64.
+	(*movabs<mode>_2): Likewise.
+
+2011-03-11  H.J. Lu  <hongjiu.lu@intel.com>
+
 	PR target/47446
 	* config/i386/i386.md (*movdi_internal_rex64): Only allow moving
 	integer constants into 64bit registers for TARGET_X32.
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index d092a84..8208491 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -2349,18 +2349,10 @@ 
 (define_insn "*movabs<mode>_1"
   [(set (mem:SWI1248x (match_operand:DI 0 "x86_64_movabs_operand" "i,r"))
 	(match_operand:SWI1248x 1 "nonmemory_operand" "a,er"))]
-  "TARGET_64BIT && ix86_check_movabs (insn, 0)"
-{
-  if (which_alternative == 0)
-    {
-      if (TARGET_X32)
-        return "movabs{<imodesuffix>}\t{%1, %P0|%P0, %1}";
-      else
-        return "mov{<imodesuffix>}\t{%1, %P0|%P0, %1}";
-    }
-  else
-    return "mov{<imodesuffix>}\t{%1, %a0|%a0, %1}";
-}
+  "TARGET_LP64 && ix86_check_movabs (insn, 0)"
+  "@
+   movabs{<imodesuffix>}\t{%1, %P0|%P0, %1}
+   mov{<imodesuffix>}\t{%1, %a0|%a0, %1}"
   [(set_attr "type" "imov")
    (set_attr "modrm" "0,*")
    (set_attr "length_address" "8,0")
@@ -2371,18 +2363,10 @@ 
 (define_insn "*movabs<mode>_2"
   [(set (match_operand:SWI1248x 0 "register_operand" "=a,r")
         (mem:SWI1248x (match_operand:DI 1 "x86_64_movabs_operand" "i,r")))]
-  "TARGET_64BIT && ix86_check_movabs (insn, 1)"
-{
-  if (which_alternative == 0)
-    {
-      if (TARGET_X32)
-        return "movabs{<imodesuffix>}\t{%P1, %0|%0, %P1}";
-      else
-        return "mov{<imodesuffix>}\t{%P1, %0|%0, %P1}";
-    }
-  else
-    return "mov{<imodesuffix>}\t{%a1, %0|%0, %a1}";
-}
+  "TARGET_LP64 && ix86_check_movabs (insn, 1)"
+  "@
+   movabs{<imodesuffix>}\t{%P1, %0|%0, %P1}
+   mov{<imodesuffix>}\t{%a1, %0|%0, %a1}"
   [(set_attr "type" "imov")
    (set_attr "modrm" "0,*")
    (set_attr "length_address" "8,0")