| Message ID | 20180121110025.9645-2-peng.fan@nxp.com |
|---|---|
| State | Awaiting Upstream |
| Delegated to: | Stefano Babic |
| Headers | show |
| Series | [U-Boot,V2,1/4] mmc: fsl_esdhc: add strobe and tuning entry | expand |
On 21/01/2018 12:00, Peng Fan wrote: > The pinmux and tuning settings are from > https://source.codeaurora.org/external/imx/linux-imx/tree/arch/ > arm/boot/dts/imx7s.dtsi?h=imx_4.9.11_1.0.0_ga > https://source.codeaurora.org/external/imx/linux-imx/tree/arch/ > arm/boot/dts/imx7d-sdb.dts?h=imx_4.9.11_1.0.0_ga > > To support HS200 and SDR104, we need change pinmux settings dynamically. > And configure tuning step and start tuning tap, otherwise you may > see tuning failure. > > Signed-off-by: Peng Fan <peng.fan@nxp.com> > Cc: Stefano Babic <sbabic@denx.de> > Cc: Fabio Estevam <fabio.estevam@nxp.com> > Cc: Jaehoon Chung <jh80.chung@samsung.com> > --- > arch/arm/dts/imx7d-sdb.dts | 88 ++++++++++++++++++++++++++++++++++++++++++++++ > 1 file changed, 88 insertions(+) > > diff --git a/arch/arm/dts/imx7d-sdb.dts b/arch/arm/dts/imx7d-sdb.dts > index 85b83c351f..a9458993df 100644 > --- a/arch/arm/dts/imx7d-sdb.dts > +++ b/arch/arm/dts/imx7d-sdb.dts > @@ -134,6 +134,28 @@ > >; > }; > > + pinctrl_usdhc1_100mhz: usdhc1grp_100mhz { > + fsl,pins = < > + MX7D_PAD_SD1_CMD__SD1_CMD 0x5a > + MX7D_PAD_SD1_CLK__SD1_CLK 0x1a > + MX7D_PAD_SD1_DATA0__SD1_DATA0 0x5a > + MX7D_PAD_SD1_DATA1__SD1_DATA1 0x5a > + MX7D_PAD_SD1_DATA2__SD1_DATA2 0x5a > + MX7D_PAD_SD1_DATA3__SD1_DATA3 0x5a > + >; > + }; > + > + pinctrl_usdhc1_200mhz: usdhc1grp_200mhz { > + fsl,pins = < > + MX7D_PAD_SD1_CMD__SD1_CMD 0x5b > + MX7D_PAD_SD1_CLK__SD1_CLK 0x1b > + MX7D_PAD_SD1_DATA0__SD1_DATA0 0x5b > + MX7D_PAD_SD1_DATA1__SD1_DATA1 0x5b > + MX7D_PAD_SD1_DATA2__SD1_DATA2 0x5b > + MX7D_PAD_SD1_DATA3__SD1_DATA3 0x5b > + >; > + }; > + > pinctrl_usdhc2: usdhc2grp { > fsl,pins = < > MX7D_PAD_SD2_CMD__SD2_CMD 0x59 > @@ -147,6 +169,28 @@ > >; > }; > > + pinctrl_usdhc2_100mhz: usdhc2grp_100mhz { > + fsl,pins = < > + MX7D_PAD_SD2_CMD__SD2_CMD 0x5a > + MX7D_PAD_SD2_CLK__SD2_CLK 0x1a > + MX7D_PAD_SD2_DATA0__SD2_DATA0 0x5a > + MX7D_PAD_SD2_DATA1__SD2_DATA1 0x5a > + MX7D_PAD_SD2_DATA2__SD2_DATA2 0x5a > + MX7D_PAD_SD2_DATA3__SD2_DATA3 0x5a > + >; > + }; > + > + pinctrl_usdhc2_200mhz: usdhc2grp_200mhz { > + fsl,pins = < > + MX7D_PAD_SD2_CMD__SD2_CMD 0x5b > + MX7D_PAD_SD2_CLK__SD2_CLK 0x1b > + MX7D_PAD_SD2_DATA0__SD2_DATA0 0x5b > + MX7D_PAD_SD2_DATA1__SD2_DATA1 0x5b > + MX7D_PAD_SD2_DATA2__SD2_DATA2 0x5b > + MX7D_PAD_SD2_DATA3__SD2_DATA3 0x5b > + >; > + }; > + > pinctrl_usdhc3: usdhc3grp { > fsl,pins = < > MX7D_PAD_SD3_CMD__SD3_CMD 0x59 > @@ -162,6 +206,38 @@ > MX7D_PAD_SD3_STROBE__SD3_STROBE 0x19 > >; > }; > + > + pinctrl_usdhc3_100mhz: usdhc3grp_100mhz { > + fsl,pins = < > + MX7D_PAD_SD3_CMD__SD3_CMD 0x5a > + MX7D_PAD_SD3_CLK__SD3_CLK 0x1a > + MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5a > + MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5a > + MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5a > + MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5a > + MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5a > + MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5a > + MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5a > + MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5a > + MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1a > + >; > + }; > + > + pinctrl_usdhc3_200mhz: usdhc3grp_200mhz { > + fsl,pins = < > + MX7D_PAD_SD3_CMD__SD3_CMD 0x5b > + MX7D_PAD_SD3_CLK__SD3_CLK 0x1b > + MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5b > + MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5b > + MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5b > + MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5b > + MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5b > + MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5b > + MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5b > + MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5b > + MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1b > + >; > + }; > }; > }; > > @@ -287,23 +363,35 @@ > &usdhc1 { > pinctrl-names = "default", "state_100mhz", "state_200mhz"; > pinctrl-0 = <&pinctrl_usdhc1>, <&pinctrl_usdhc1_gpio>; > + pinctrl-1 = <&pinctrl_usdhc1_100mhz>, <&pinctrl_usdhc1_gpio>; > + pinctrl-2 = <&pinctrl_usdhc1_200mhz>, <&pinctrl_usdhc1_gpio>; > cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>; > wp-gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; > vmmc-supply = <®_sd1_vmmc>; > + fsl,tuning-start-tap = <20>; > + fsl,tuning-step= <2>; > status = "okay"; > }; > > &usdhc2 { > pinctrl-names = "default", "state_100mhz", "state_200mhz"; > pinctrl-0 = <&pinctrl_usdhc2>; > + pinctrl-1 = <&pinctrl_usdhc2_100mhz>; > + pinctrl-2 = <&pinctrl_usdhc2_200mhz>; > non-removable; > + fsl,tuning-start-tap = <20>; > + fsl,tuning-step= <2>; > status = "okay"; > }; > > &usdhc3 { > pinctrl-names = "default", "state_100mhz", "state_200mhz"; > pinctrl-0 = <&pinctrl_usdhc3>; > + pinctrl-1 = <&pinctrl_usdhc3_100mhz>; > + pinctrl-2 = <&pinctrl_usdhc3_200mhz>; > bus-width = <8>; > non-removable; > + fsl,tuning-start-tap = <20>; > + fsl,tuning-step= <2>; > status = "okay"; > }; > Applied to u-boot-imx, thanks ! Best regards, Stefano Babic
diff --git a/arch/arm/dts/imx7d-sdb.dts b/arch/arm/dts/imx7d-sdb.dts index 85b83c351f..a9458993df 100644 --- a/arch/arm/dts/imx7d-sdb.dts +++ b/arch/arm/dts/imx7d-sdb.dts @@ -134,6 +134,28 @@ >; }; + pinctrl_usdhc1_100mhz: usdhc1grp_100mhz { + fsl,pins = < + MX7D_PAD_SD1_CMD__SD1_CMD 0x5a + MX7D_PAD_SD1_CLK__SD1_CLK 0x1a + MX7D_PAD_SD1_DATA0__SD1_DATA0 0x5a + MX7D_PAD_SD1_DATA1__SD1_DATA1 0x5a + MX7D_PAD_SD1_DATA2__SD1_DATA2 0x5a + MX7D_PAD_SD1_DATA3__SD1_DATA3 0x5a + >; + }; + + pinctrl_usdhc1_200mhz: usdhc1grp_200mhz { + fsl,pins = < + MX7D_PAD_SD1_CMD__SD1_CMD 0x5b + MX7D_PAD_SD1_CLK__SD1_CLK 0x1b + MX7D_PAD_SD1_DATA0__SD1_DATA0 0x5b + MX7D_PAD_SD1_DATA1__SD1_DATA1 0x5b + MX7D_PAD_SD1_DATA2__SD1_DATA2 0x5b + MX7D_PAD_SD1_DATA3__SD1_DATA3 0x5b + >; + }; + pinctrl_usdhc2: usdhc2grp { fsl,pins = < MX7D_PAD_SD2_CMD__SD2_CMD 0x59 @@ -147,6 +169,28 @@ >; }; + pinctrl_usdhc2_100mhz: usdhc2grp_100mhz { + fsl,pins = < + MX7D_PAD_SD2_CMD__SD2_CMD 0x5a + MX7D_PAD_SD2_CLK__SD2_CLK 0x1a + MX7D_PAD_SD2_DATA0__SD2_DATA0 0x5a + MX7D_PAD_SD2_DATA1__SD2_DATA1 0x5a + MX7D_PAD_SD2_DATA2__SD2_DATA2 0x5a + MX7D_PAD_SD2_DATA3__SD2_DATA3 0x5a + >; + }; + + pinctrl_usdhc2_200mhz: usdhc2grp_200mhz { + fsl,pins = < + MX7D_PAD_SD2_CMD__SD2_CMD 0x5b + MX7D_PAD_SD2_CLK__SD2_CLK 0x1b + MX7D_PAD_SD2_DATA0__SD2_DATA0 0x5b + MX7D_PAD_SD2_DATA1__SD2_DATA1 0x5b + MX7D_PAD_SD2_DATA2__SD2_DATA2 0x5b + MX7D_PAD_SD2_DATA3__SD2_DATA3 0x5b + >; + }; + pinctrl_usdhc3: usdhc3grp { fsl,pins = < MX7D_PAD_SD3_CMD__SD3_CMD 0x59 @@ -162,6 +206,38 @@ MX7D_PAD_SD3_STROBE__SD3_STROBE 0x19 >; }; + + pinctrl_usdhc3_100mhz: usdhc3grp_100mhz { + fsl,pins = < + MX7D_PAD_SD3_CMD__SD3_CMD 0x5a + MX7D_PAD_SD3_CLK__SD3_CLK 0x1a + MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5a + MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5a + MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5a + MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5a + MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5a + MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5a + MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5a + MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5a + MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1a + >; + }; + + pinctrl_usdhc3_200mhz: usdhc3grp_200mhz { + fsl,pins = < + MX7D_PAD_SD3_CMD__SD3_CMD 0x5b + MX7D_PAD_SD3_CLK__SD3_CLK 0x1b + MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5b + MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5b + MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5b + MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5b + MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5b + MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5b + MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5b + MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5b + MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1b + >; + }; }; }; @@ -287,23 +363,35 @@ &usdhc1 { pinctrl-names = "default", "state_100mhz", "state_200mhz"; pinctrl-0 = <&pinctrl_usdhc1>, <&pinctrl_usdhc1_gpio>; + pinctrl-1 = <&pinctrl_usdhc1_100mhz>, <&pinctrl_usdhc1_gpio>; + pinctrl-2 = <&pinctrl_usdhc1_200mhz>, <&pinctrl_usdhc1_gpio>; cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>; wp-gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; vmmc-supply = <®_sd1_vmmc>; + fsl,tuning-start-tap = <20>; + fsl,tuning-step= <2>; status = "okay"; }; &usdhc2 { pinctrl-names = "default", "state_100mhz", "state_200mhz"; pinctrl-0 = <&pinctrl_usdhc2>; + pinctrl-1 = <&pinctrl_usdhc2_100mhz>; + pinctrl-2 = <&pinctrl_usdhc2_200mhz>; non-removable; + fsl,tuning-start-tap = <20>; + fsl,tuning-step= <2>; status = "okay"; }; &usdhc3 { pinctrl-names = "default", "state_100mhz", "state_200mhz"; pinctrl-0 = <&pinctrl_usdhc3>; + pinctrl-1 = <&pinctrl_usdhc3_100mhz>; + pinctrl-2 = <&pinctrl_usdhc3_200mhz>; bus-width = <8>; non-removable; + fsl,tuning-start-tap = <20>; + fsl,tuning-step= <2>; status = "okay"; };
The pinmux and tuning settings are from https://source.codeaurora.org/external/imx/linux-imx/tree/arch/ arm/boot/dts/imx7s.dtsi?h=imx_4.9.11_1.0.0_ga https://source.codeaurora.org/external/imx/linux-imx/tree/arch/ arm/boot/dts/imx7d-sdb.dts?h=imx_4.9.11_1.0.0_ga To support HS200 and SDR104, we need change pinmux settings dynamically. And configure tuning step and start tuning tap, otherwise you may see tuning failure. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> --- arch/arm/dts/imx7d-sdb.dts | 88 ++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 88 insertions(+)