diff mbox series

[v8,18/17] !fixup sdhci: add DMA and 64-bit capabilities (Spec v2)

Message ID 20180118185011.19315-1-f4bug@amsat.org
State Not Applicable, archived
Headers show
Series None | expand

Commit Message

Philippe Mathieu-Daudé Jan. 18, 2018, 6:50 p.m. UTC 
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
missed from patch 14/17 while rebasing :|

 hw/sd/sdhci.c | 18 ------------------
 1 file changed, 18 deletions(-)
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Patch

diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c
index d0d64f0c52..51368e028e 100644
--- a/hw/sd/sdhci.c
+++ b/hw/sd/sdhci.c
@@ -41,24 +41,6 @@ 
 #define TYPE_SDHCI_BUS "sdhci-bus"
 #define SDHCI_BUS(obj) OBJECT_CHECK(SDBus, (obj), TYPE_SDHCI_BUS)
 
-/* Default SD/MMC host controller features information, which will be
- * presented in CAPABILITIES register of generic SD host controller at reset.
- * If not stated otherwise:
- * 0 - not supported, 1 - supported, other - prohibited.
- */
-#define SDHC_CAPAB_64BITBUS       0ul        /* 64-bit System Bus Support */
-#define SDHC_CAPAB_ADMA1          1ul        /* ADMA1 support */
-#define SDHC_CAPAB_ADMA2          1ul        /* ADMA2 support */
-
-/* Now check all parameters and calculate CAPABILITIES REGISTER value */
-#if SDHC_CAPAB_64BITBUS > 1 || SDHC_CAPAB_ADMA2 > 1 || SDHC_CAPAB_ADMA1 > 1
-#error Capabilities features can have value 0 or 1 only!
-#endif
-
-#define SDHC_CAPAB_REG_DEFAULT                                 \
-   ((SDHC_CAPAB_64BITBUS << 28) | (SDHC_CAPAB_ADMA1 << 20) |   \
-    (SDHC_CAPAB_ADMA2 << 19))
-
 #define MASKED_WRITE(reg, mask, val)  (reg = (reg & (mask)) | (val))
 
 static void sdhci_check_capab_freq_range(SDHCIState *s, const char *desc,