From patchwork Thu Jan 18 13:48:08 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexey Brodkin X-Patchwork-Id: 862904 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.infradead.org (client-ip=65.50.211.133; helo=bombadil.infradead.org; envelope-from=linux-snps-arc-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="GWb1ing6"; dkim-atps=neutral Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3zMlfS2K7jz9s81 for ; Fri, 19 Jan 2018 00:48:32 +1100 (AEDT) DKIM-Signature: v=1; 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Thu, 18 Jan 2018 13:48:28 +0000 Received: from mailhost.synopsys.com (mailhost1.synopsys.com [10.12.238.239]) by smtprelay.synopsys.com (Postfix) with ESMTP id 0125224E0999; Thu, 18 Jan 2018 05:48:14 -0800 (PST) Received: from mailhost.synopsys.com (localhost [127.0.0.1]) by mailhost.synopsys.com (Postfix) with ESMTP id D894DADC; Thu, 18 Jan 2018 05:48:13 -0800 (PST) Received: from ru20arcgnu1.internal.synopsys.com (ru20arcgnu1.internal.synopsys.com [10.121.9.48]) by mailhost.synopsys.com (Postfix) with ESMTP id A8C19AD1; Thu, 18 Jan 2018 05:48:12 -0800 (PST) From: Alexey Brodkin To: linux-snps-arc@lists.infradead.org Subject: [PATCH] ARC: Allow disabling of prefetch operations for debugging purposes Date: Thu, 18 Jan 2018 16:48:08 +0300 Message-Id: <20180118134808.40970-1-abrodkin@synopsys.com> X-Mailer: git-send-email 2.11.0 X-Spam-Note: CRM114 invocation failed X-Spam-Score: -1.9 (-) X-Spam-Report: SpamAssassin version 3.4.1 on bombadil.infradead.org summary: Content analysis details: (-1.9 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at http://www.dnswl.org/, no trust [198.182.47.9 listed in list.dnswl.org] -0.0 T_RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -0.0 RCVD_IN_MSPIKE_H4 RBL: Very Good reputation (+4) [198.182.47.9 listed in wl.mailspike.net] -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] -0.0 RCVD_IN_MSPIKE_WL Mailspike good senders X-BeenThere: linux-snps-arc@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: Linux on Synopsys ARC Processors List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Vineet Gupta , Alexey Brodkin , linux-kernel@vger.kernel.org MIME-Version: 1.0 Sender: "linux-snps-arc" Errors-To: linux-snps-arc-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org Signed-off-by: Alexey Brodkin --- arch/arc/Kconfig | 5 +++++ arch/arc/include/asm/processor.h | 11 +++++++++++ arch/arc/lib/memcpy-archs.S | 16 ++++++++++++++++ arch/arc/lib/memset-archs.S | 6 ++++++ 4 files changed, 38 insertions(+) diff --git a/arch/arc/Kconfig b/arch/arc/Kconfig index 9d5fd00d9e91..aa5262e8e43f 100644 --- a/arch/arc/Kconfig +++ b/arch/arc/Kconfig @@ -532,6 +532,11 @@ config ARC_DBG_TLB_PARANOIA bool "Paranoia Checks in Low Level TLB Handlers" default n +config ARC_DISABLE_PREFETCH + bool "Disable use of prefetch instructions" + default n + help + Suppresses usage of prefetchw and prealloc instructions. endif config ARC_UBOOT_SUPPORT diff --git a/arch/arc/include/asm/processor.h b/arch/arc/include/asm/processor.h index 8ee41e988169..01011c0515d4 100644 --- a/arch/arc/include/asm/processor.h +++ b/arch/arc/include/asm/processor.h @@ -106,6 +106,17 @@ extern unsigned int get_wchan(struct task_struct *p); */ #define current_text_addr() ({ __label__ _l; _l: &&_l; }) +#ifdef CONFIG_ARC_DISABLE_PREFETCH +#define ARCH_HAS_PREFETCH +#define prefetch(x) + +#define ARCH_HAS_PREFETCHW +#define prefetchw(x) + +#define ARCH_HAS_SPINLOCK_PREFETCH +#define spin_lock_prefetch(x) +#endif /* CONFIG_ARC_DISABLE_PREFETCH */ + #endif /* !__ASSEMBLY__ */ /* diff --git a/arch/arc/lib/memcpy-archs.S b/arch/arc/lib/memcpy-archs.S index d61044dd8b58..0a29d024be01 100644 --- a/arch/arc/lib/memcpy-archs.S +++ b/arch/arc/lib/memcpy-archs.S @@ -41,8 +41,10 @@ #endif ENTRY_CFI(memcpy) +#ifndef CONFIG_ARC_DISABLE_PREFETCH prefetch [r1] ; Prefetch the read location prefetchw [r0] ; Prefetch the write location +#endif mov.f 0, r2 ;;; if size is zero jz.d [blink] @@ -72,8 +74,10 @@ ENTRY_CFI(memcpy) lpnz @.Lcopy32_64bytes ;; LOOP START LOADX (r6, r1) +#ifndef CONFIG_ARC_DISABLE_PREFETCH PREFETCH_READ (r1) PREFETCH_WRITE (r3) +#endif LOADX (r8, r1) LOADX (r10, r1) LOADX (r4, r1) @@ -117,9 +121,13 @@ ENTRY_CFI(memcpy) lpnz @.Lcopy8bytes_1 ;; LOOP START ld.ab r6, [r1, 4] +#ifndef CONFIG_ARC_DISABLE_PREFETCH prefetch [r1, 28] ;Prefetch the next read location +#endif ld.ab r8, [r1,4] +#ifndef CONFIG_ARC_DISABLE_PREFETCH prefetchw [r3, 32] ;Prefetch the next write location +#endif SHIFT_1 (r7, r6, 24) or r7, r7, r5 @@ -162,9 +170,13 @@ ENTRY_CFI(memcpy) lpnz @.Lcopy8bytes_2 ;; LOOP START ld.ab r6, [r1, 4] +#ifndef CONFIG_ARC_DISABLE_PREFETCH prefetch [r1, 28] ;Prefetch the next read location +#endif ld.ab r8, [r1,4] +#ifndef CONFIG_ARC_DISABLE_PREFETCH prefetchw [r3, 32] ;Prefetch the next write location +#endif SHIFT_1 (r7, r6, 16) or r7, r7, r5 @@ -204,9 +216,13 @@ ENTRY_CFI(memcpy) lpnz @.Lcopy8bytes_3 ;; LOOP START ld.ab r6, [r1, 4] +#ifndef CONFIG_ARC_DISABLE_PREFETCH prefetch [r1, 28] ;Prefetch the next read location +#endif ld.ab r8, [r1,4] +#ifndef CONFIG_ARC_DISABLE_PREFETCH prefetchw [r3, 32] ;Prefetch the next write location +#endif SHIFT_1 (r7, r6, 8) or r7, r7, r5 diff --git a/arch/arc/lib/memset-archs.S b/arch/arc/lib/memset-archs.S index 62ad4bcb841a..343f292d92a0 100644 --- a/arch/arc/lib/memset-archs.S +++ b/arch/arc/lib/memset-archs.S @@ -11,7 +11,9 @@ #undef PREALLOC_NOT_AVAIL ENTRY_CFI(memset) +#ifndef CONFIG_ARC_DISABLE_PREFETCH prefetchw [r0] ; Prefetch the write location +#endif mov.f 0, r2 ;;; if size is zero jz.d [blink] @@ -48,11 +50,13 @@ ENTRY_CFI(memset) lpnz @.Lset64bytes ;; LOOP START +#ifndef CONFIG_ARC_DISABLE_PREFETCH #ifdef PREALLOC_NOT_AVAIL prefetchw [r3, 64] ;Prefetch the next write location #else prealloc [r3, 64] #endif +#endif /* CONFIG_ARC_DISABLE_PREFETCH */ #ifdef CONFIG_ARC_HAS_LL64 std.ab r4, [r3, 8] std.ab r4, [r3, 8] @@ -85,7 +89,9 @@ ENTRY_CFI(memset) lsr.f lp_count, r2, 5 ;Last remaining max 124 bytes lpnz .Lset32bytes ;; LOOP START +#ifndef CONFIG_ARC_DISABLE_PREFETCH prefetchw [r3, 32] ;Prefetch the next write location +#endif #ifdef CONFIG_ARC_HAS_LL64 std.ab r4, [r3, 8] std.ab r4, [r3, 8]