[v4,7/8] MIPS: BMIPS: Add PCI bindings for 7425, 7435

Message ID 1516058925-46522-8-git-send-email-jim2101024@gmail.com
State Under Review
Delegated to: Lorenzo Pieralisi
Headers show
Series
  • PCI: brcmstb: Add Broadcom Settopbox PCIe support
Related show

Commit Message

Jim Quinlan Jan. 15, 2018, 11:28 p.m.
Adds the PCIe nodes for the Broadcom STB PCIe root complex.

Signed-off-by: Jim Quinlan <jim2101024@gmail.com>
---
 arch/mips/boot/dts/brcm/bcm7425.dtsi     | 26 ++++++++++++++++++++++++++
 arch/mips/boot/dts/brcm/bcm7435.dtsi     | 27 +++++++++++++++++++++++++++
 arch/mips/boot/dts/brcm/bcm97425svmb.dts |  4 ++++
 arch/mips/boot/dts/brcm/bcm97435svmb.dts |  4 ++++
 4 files changed, 61 insertions(+)

Comments

James Hogan March 9, 2018, 2:44 p.m. | #1
On Mon, Jan 15, 2018 at 06:28:44PM -0500, Jim Quinlan wrote:
> diff --git a/arch/mips/boot/dts/brcm/bcm7425.dtsi b/arch/mips/boot/dts/brcm/bcm7425.dtsi
> index e4fb9b6..02168d0 100644
> --- a/arch/mips/boot/dts/brcm/bcm7425.dtsi
> +++ b/arch/mips/boot/dts/brcm/bcm7425.dtsi
> @@ -495,4 +495,30 @@
>  			status = "disabled";
>  		};
>  	};
> +
> +	pcie: pcie@10410000 {
> +		reg = <0x10410000 0x830c>;
> +		compatible = "brcm,bcm7425-pcie";
> +		interrupts = <37>, <37>;
> +		interrupt-names = "pcie", "msi";
> +		interrupt-parent = <&periph_intc>;
> +		#address-cells = <3>;
> +		#size-cells = <2>;
> +		linux,pci-domain = <0>;
> +		brcm,enable-ssc;
> +		bus-range = <0x00 0xff>;
> +		msi-controller;
> +		#interrupt-cells = <1>;
> +		/* 4x128mb windows */
> +		ranges = <0x2000000 0x0 0xd0000000 0xd0000000 0 0x08000000>,
> +			 <0x2000000 0x0 0xd8000000 0xd8000000 0 0x08000000>,
> +			 <0x2000000 0x0 0xe0000000 0xe0000000 0 0x08000000>,
> +			 <0x2000000 0x0 0xe8000000 0xe8000000 0 0x08000000>;
> +		interrupt-map-mask = <0 0 0 7>;
> +		interrupt-map = <0 0 0 1 &periph_intc 33
> +				 0 0 0 2 &periph_intc 34
> +				 0 0 0 3 &periph_intc 35
> +				 0 0 0 4 &periph_intc 36>;

no status = "disabled" like the other dtsi?

> +	};
> +
>  };
> diff --git a/arch/mips/boot/dts/brcm/bcm7435.dtsi b/arch/mips/boot/dts/brcm/bcm7435.dtsi
> index 1484e89..84881224 100644
> --- a/arch/mips/boot/dts/brcm/bcm7435.dtsi
> +++ b/arch/mips/boot/dts/brcm/bcm7435.dtsi
> @@ -510,4 +510,31 @@
>  			status = "disabled";
>  		};
>  	};
> +
> +	pcie: pcie@10410000 {
> +		reg = <0x10410000 0x930c>;
> +		interrupts = <0x27>, <0x27>;
> +		interrupt-names = "pcie", "msi";
> +		interrupt-parent = <&periph_intc>;
> +		compatible = "brcm,bcm7435-pcie";

Might be nice to be consistent in your property ordering between these
two dtsi files. I for one would prefer compatible to be near the top
too, if only for consistency with most other nodes in these files.

> +		#address-cells = <3>;
> +		#size-cells = <2>;
> +		linux,pci-domain = <0>;
> +		brcm,enable-ssc;
> +		bus-range = <0x00 0xff>;
> +		msi-controller;
> +		#interrupt-cells = <1>;
> +		/* 4x128mb windows */
> +		ranges = <0x2000000 0x0 0xd0000000 0xd0000000 0 0x08000000>,
> +			 <0x2000000 0x0 0xd8000000 0xd8000000 0 0x08000000>,
> +			 <0x2000000 0x0 0xe0000000 0xe0000000 0 0x08000000>,
> +			 <0x2000000 0x0 0xe8000000 0xe8000000 0 0x08000000>;
> +		interrupt-map-mask = <0 0 0 7>;
> +		interrupt-map = <0 0 0 1 &periph_intc 35
> +				 0 0 0 2 &periph_intc 36
> +				 0 0 0 3 &periph_intc 37
> +				 0 0 0 4 &periph_intc 38>;
> +		status = "disabled";
> +	};
> +
>  };

Cheers
James

Patch

diff --git a/arch/mips/boot/dts/brcm/bcm7425.dtsi b/arch/mips/boot/dts/brcm/bcm7425.dtsi
index e4fb9b6..02168d0 100644
--- a/arch/mips/boot/dts/brcm/bcm7425.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7425.dtsi
@@ -495,4 +495,30 @@ 
 			status = "disabled";
 		};
 	};
+
+	pcie: pcie@10410000 {
+		reg = <0x10410000 0x830c>;
+		compatible = "brcm,bcm7425-pcie";
+		interrupts = <37>, <37>;
+		interrupt-names = "pcie", "msi";
+		interrupt-parent = <&periph_intc>;
+		#address-cells = <3>;
+		#size-cells = <2>;
+		linux,pci-domain = <0>;
+		brcm,enable-ssc;
+		bus-range = <0x00 0xff>;
+		msi-controller;
+		#interrupt-cells = <1>;
+		/* 4x128mb windows */
+		ranges = <0x2000000 0x0 0xd0000000 0xd0000000 0 0x08000000>,
+			 <0x2000000 0x0 0xd8000000 0xd8000000 0 0x08000000>,
+			 <0x2000000 0x0 0xe0000000 0xe0000000 0 0x08000000>,
+			 <0x2000000 0x0 0xe8000000 0xe8000000 0 0x08000000>;
+		interrupt-map-mask = <0 0 0 7>;
+		interrupt-map = <0 0 0 1 &periph_intc 33
+				 0 0 0 2 &periph_intc 34
+				 0 0 0 3 &periph_intc 35
+				 0 0 0 4 &periph_intc 36>;
+	};
+
 };
diff --git a/arch/mips/boot/dts/brcm/bcm7435.dtsi b/arch/mips/boot/dts/brcm/bcm7435.dtsi
index 1484e89..84881224 100644
--- a/arch/mips/boot/dts/brcm/bcm7435.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7435.dtsi
@@ -510,4 +510,31 @@ 
 			status = "disabled";
 		};
 	};
+
+	pcie: pcie@10410000 {
+		reg = <0x10410000 0x930c>;
+		interrupts = <0x27>, <0x27>;
+		interrupt-names = "pcie", "msi";
+		interrupt-parent = <&periph_intc>;
+		compatible = "brcm,bcm7435-pcie";
+		#address-cells = <3>;
+		#size-cells = <2>;
+		linux,pci-domain = <0>;
+		brcm,enable-ssc;
+		bus-range = <0x00 0xff>;
+		msi-controller;
+		#interrupt-cells = <1>;
+		/* 4x128mb windows */
+		ranges = <0x2000000 0x0 0xd0000000 0xd0000000 0 0x08000000>,
+			 <0x2000000 0x0 0xd8000000 0xd8000000 0 0x08000000>,
+			 <0x2000000 0x0 0xe0000000 0xe0000000 0 0x08000000>,
+			 <0x2000000 0x0 0xe8000000 0xe8000000 0 0x08000000>;
+		interrupt-map-mask = <0 0 0 7>;
+		interrupt-map = <0 0 0 1 &periph_intc 35
+				 0 0 0 2 &periph_intc 36
+				 0 0 0 3 &periph_intc 37
+				 0 0 0 4 &periph_intc 38>;
+		status = "disabled";
+	};
+
 };
diff --git a/arch/mips/boot/dts/brcm/bcm97425svmb.dts b/arch/mips/boot/dts/brcm/bcm97425svmb.dts
index ce762c7..a958e56 100644
--- a/arch/mips/boot/dts/brcm/bcm97425svmb.dts
+++ b/arch/mips/boot/dts/brcm/bcm97425svmb.dts
@@ -144,3 +144,7 @@ 
 &mspi {
 	status = "okay";
 };
+
+&pcie {
+	status = "okay";
+};
diff --git a/arch/mips/boot/dts/brcm/bcm97435svmb.dts b/arch/mips/boot/dts/brcm/bcm97435svmb.dts
index d4dd31a..f41791e 100644
--- a/arch/mips/boot/dts/brcm/bcm97435svmb.dts
+++ b/arch/mips/boot/dts/brcm/bcm97435svmb.dts
@@ -120,3 +120,7 @@ 
 &mspi {
 	status = "okay";
 };
+
+&pcie {
+	status = "okay";
+};