From patchwork Sat Jan 13 01:05:41 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Karthikeyan Ramasubramanian X-Patchwork-Id: 860252 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-i2c-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=codeaurora.org header.i=@codeaurora.org header.b="duLWJOpF"; dkim=pass (1024-bit key) header.d=codeaurora.org header.i=@codeaurora.org header.b="duLWJOpF"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3zJLzF0rQRz9t2x for ; Sat, 13 Jan 2018 12:06:17 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S965422AbeAMBGN (ORCPT ); Fri, 12 Jan 2018 20:06:13 -0500 Received: from smtp.codeaurora.org ([198.145.29.96]:38466 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S965326AbeAMBGK (ORCPT ); Fri, 12 Jan 2018 20:06:10 -0500 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id D3E2C60556; Sat, 13 Jan 2018 01:06:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1515805569; bh=v/mBZrGLbQGvNZjYjToW0ZwSi3VXbFX49KIo/bZDFHU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=duLWJOpFCp1JAsjlNMRVRvdWuNYr/09HlUTfByzTLo8z9m9+orqZlroEz9XSB2qde OdA2XYFRkHpud7gU4Kk5KQNj0mhQgbNczlJYk4nfdVXY59USy0h2Fe93Sp433NgKm9 W8FoyyAW/+b2SiJsnB2fBNw5xyw/dTevz5MXFd2c= X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on pdx-caf-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.8 required=2.0 tests=ALL_TRUSTED,BAYES_00, DKIM_SIGNED, T_DKIM_INVALID autolearn=no autolearn_force=no version=3.4.0 Received: from codeaurora.org (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: kramasub@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 05342607DC; Sat, 13 Jan 2018 01:06:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1515805569; bh=v/mBZrGLbQGvNZjYjToW0ZwSi3VXbFX49KIo/bZDFHU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=duLWJOpFCp1JAsjlNMRVRvdWuNYr/09HlUTfByzTLo8z9m9+orqZlroEz9XSB2qde OdA2XYFRkHpud7gU4Kk5KQNj0mhQgbNczlJYk4nfdVXY59USy0h2Fe93Sp433NgKm9 W8FoyyAW/+b2SiJsnB2fBNw5xyw/dTevz5MXFd2c= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 05342607DC Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=kramasub@codeaurora.org From: Karthikeyan Ramasubramanian To: corbet@lwn.net, andy.gross@linaro.org, david.brown@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, wsa@the-dreams.de, gregkh@linuxfoundation.org Cc: Karthikeyan Ramasubramanian , linux-doc@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-i2c@vger.kernel.org, linux-serial@vger.kernel.org, jslaby@suse.com Subject: [PATCH v2 1/7] qcom-geni-se: Add QCOM GENI SE Driver summary Date: Fri, 12 Jan 2018 18:05:41 -0700 Message-Id: <1515805547-22816-2-git-send-email-kramasub@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1515805547-22816-1-git-send-email-kramasub@codeaurora.org> References: <1515805547-22816-1-git-send-email-kramasub@codeaurora.org> Sender: linux-i2c-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-i2c@vger.kernel.org Generic Interface (GENI) firmware based Qualcomm Universal Peripheral (QUP) Wrapper is a programmable module that is composed of multiple Serial Engines (SE) and can support various Serial Interfaces like UART, SPI, I2C, I3C, etc. This document provides a high level overview of the GENI based QUP Wrapper. Signed-off-by: Karthikeyan Ramasubramanian --- Documentation/qcom-geni-se.txt | 56 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 56 insertions(+) create mode 100644 Documentation/qcom-geni-se.txt diff --git a/Documentation/qcom-geni-se.txt b/Documentation/qcom-geni-se.txt new file mode 100644 index 0000000..dc517ef --- /dev/null +++ b/Documentation/qcom-geni-se.txt @@ -0,0 +1,56 @@ +Introduction +============ + +Generic Interface (GENI) Serial Engine (SE) Wrapper driver is introduced +to manage GENI firmware based Qualcomm Universal Peripheral (QUP) Wrapper +controller. QUP Wrapper is designed to support various serial bus protocols +like UART, SPI, I2C, I3C, etc. + +Hardware description +==================== + +GENI based QUP is a highly-flexible and programmable module for supporting +a wide range of serial interfaces like UART, SPI, I2C, I3C, etc. A single +QUP module can provide upto 8 Serial Interfaces, using its internal +Serial Engines. The actual configuration is determined by the target +platform configuration. The protocol supported by each interface is +determined by the firmware loaded to the Serial Engine. Each SE consists +of a DMA Engine and GENI sub modules which enable Serial Engines to +support FIFO and DMA modes of operation. + +:: + + +-----------------------------------------+ + |QUP Wrapper | + | +----------------------------+ | + --QUP & SE Clocks--> | Serial Engine N | +-IO------> + | | ... | | Interface + <---Clock Perf.----+ +----+-----------------------+ | | + State Interface | | Serial Engine 1 | | | + | | | | | + | | | | | + <--------AHB-------> | | | | + | | +----+ | + | | | | + | | | | + <------SE IRQ------+ +----------------------------+ | + | | + +-----------------------------------------+ + + Figure 1: GENI based QUP Wrapper + +Software description +==================== + +GENI SE Wrapper driver is structured into 2 parts: + +geni_se_device represents QUP Wrapper controller. This part of the driver +manages QUP Wrapper information such as hardware version, clock +performance table that is common to all the internal Serial Engines. + +geni_se_rsc represents Serial Engine. This part of the driver manages +Serial Engine information such as clocks, pinctrl states, containing QUP +Wrapper. This part of driver also supports operations(eg. initialize the +concerned Serial Engine, select between FIFO and DMA mode of operation etc.) +that are common to all the Serial Engines and are independent of Serial +Interfaces.