[U-Boot,2/3] rockchip: Add RV1108 SPL support

Message ID 1515725102-25459-1-git-send-email-huan.he@rock-chips.com
State Changes Requested
Delegated to: Philipp Tomsich
Headers show
Series
  • [U-Boot,1/3] rockchip: add rv1108 sdram driver
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Commit Message

huan.he@rock-chips.com Jan. 12, 2018, 2:45 a.m.
add rv1108 set for supporting spl.

Signed-off-by: zhihuan he <huan.he@rock-chips.com>
---

 arch/arm/mach-rockchip/Kconfig            |  2 +
 arch/arm/mach-rockchip/Makefile           |  1 +
 arch/arm/mach-rockchip/rv1108-board-spl.c | 80 +++++++++++++++++++++++++++++++
 configs/evb-rv1108_defconfig              | 14 ++++++
 include/configs/rv1108_common.h           | 11 +++++
 5 files changed, 108 insertions(+)
 create mode 100644 arch/arm/mach-rockchip/rv1108-board-spl.c

Comments

Dr. Philipp Tomsich Jan. 12, 2018, 11:11 a.m. | #1
See below for comments and requested changes.

> On 12 Jan 2018, at 03:45, zhihuan he <huan.he@rock-chips.com> wrote:
> 
> add rv1108 set for supporting spl.
> 
> Signed-off-by: zhihuan he <huan.he@rock-chips.com>
> ---
> 
> arch/arm/mach-rockchip/Kconfig            |  2 +
> arch/arm/mach-rockchip/Makefile           |  1 +
> arch/arm/mach-rockchip/rv1108-board-spl.c | 80 +++++++++++++++++++++++++++++++
> configs/evb-rv1108_defconfig              | 14 ++++++
> include/configs/rv1108_common.h           | 11 +++++
> 5 files changed, 108 insertions(+)
> create mode 100644 arch/arm/mach-rockchip/rv1108-board-spl.c
> 
> diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
> index 967290f..b7d3bf1 100644
> --- a/arch/arm/mach-rockchip/Kconfig
> +++ b/arch/arm/mach-rockchip/Kconfig
> @@ -139,6 +139,8 @@ config ROCKCHIP_RK3399
> config ROCKCHIP_RV1108
> 	bool "Support Rockchip RV1108"
> 	select CPU_V7
> +	select SUPPORT_SPL
> +	select SPL
> 	help
> 	  The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7
> 	  and a DSP.
> diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
> index e1b0519..5f213b0 100644
> --- a/arch/arm/mach-rockchip/Makefile
> +++ b/arch/arm/mach-rockchip/Makefile
> @@ -14,6 +14,7 @@ obj-tpl-$(CONFIG_ROCKCHIP_BROM_HELPER) += bootrom.o
> obj-tpl-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board-tpl.o
> obj-tpl-$(CONFIG_ROCKCHIP_RK3368) += rk3368-board-tpl.o
> 
> +obj-spl-$(CONFIG_ROCKCHIP_RV1108) += rv1108-board-spl.o
> obj-spl-$(CONFIG_ROCKCHIP_RK3036) += rk3036-board-spl.o
> obj-spl-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board-spl.o
> obj-spl-$(CONFIG_ROCKCHIP_RK322X) += rk322x-board-spl.o
> diff --git a/arch/arm/mach-rockchip/rv1108-board-spl.c b/arch/arm/mach-rockchip/rv1108-board-spl.c
> new file mode 100644
> index 0000000..75ac4e9
> --- /dev/null
> +++ b/arch/arm/mach-rockchip/rv1108-board-spl.c
> @@ -0,0 +1,80 @@
> +/*
> + * Copyright (C) 2017 Rockchip Electronics Co., Ltd
> + * Author: zhihuan he <huan.he@rock-chips.com>
> + * SPDX-License-Identifier:	GPL-2.0+
> + */
> +
> +#include <common.h>
> +#include <debug_uart.h>
> +#include <asm/io.h>
> +#include <asm/arch/bootrom.h>
> +#include <asm/arch/hardware.h>
> +#include <asm/arch/sdram.h>
> +#include <asm/arch/timer.h>
> +#include <asm/arch/grf_rv1108.h>
> +#include <asm/arch/sdram_rv1108.h>
> +
> +#define GRF_BASE		0x10300000
> +
> +struct rv1108_grf * const grf = (void *)GRF_BASE;

Please don’t make this a static variable.
If functions need it, they should have a local copy.

> +
> +static void write_cntfrq(u32 cntfrq)
> +{
> +	asm __volatile__ ("mcr p15, 0, %0, c14, c0, 0\n" : : "r"(cntfrq));
> +}
> +
> +void board_timer_init(void)
> +{
> +	/* Initialize CNTFRQ */
> +	write_cntfrq(CONFIG_SYS_TIMER_RATE);

Please do this by defining COUNTER_FREQUENCY and implementing
similar code (to initialise the counter-frequency, if COUNTER_FREQUENCY
is defined) in armv7/start.S as for armv8/start.S.

> +
> +	/* Enable STimer1 for core */
> +	rockchip_timer_init();

Can we do this through DM instead?

> +}
> +
> +void board_debug_uart_init(void)
> +{
> +#if defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0x10230000)
> +	rk_clrsetreg(&grf->gpio3a_iomux,	/* UART0 */
> +		     GPIO3A6_MASK | GPIO3A5_MASK,
> +		     GPIO3A6_UART1_SOUT << GPIO3A6_SHIFT |
> +		     GPIO3A5_UART1_SIN << GPIO3A5_SHIFT);
> +#else
> +	rk_clrsetreg(&grf->gpio2d_iomux,	/* UART2 */
> +		     GPIO2D2_MASK | GPIO2D1_MASK,
> +		     GPIO2D2_UART2_SOUT_M0 << GPIO2D2_SHIFT |
> +		     GPIO2D1_UART2_SIN_M0 << GPIO2D1_SHIFT);
> +#endif
> +}
> +
> +void board_init_f(ulong dummy)
> +{
> +	board_timer_init();
> +#define EARLY_UART
> +#ifdef EARLY_UART
> +	/*
> +	 * Debug UART can be used from here if required:
> +	 *
> +	 * debug_uart_init();
> +	 * printch('a');
> +	 * printhex8(0x1234);
> +	 * printascii("string");
> +	 */
> +	debug_uart_init();
> +	printascii("U-Boot SPL board init\n");
> +#endif
> +	rv1108_sdram_init();
> +	printascii("U-Boot SPL sdram init\n");
> +	/* return to maskrom */
> +	back_to_bootrom(BROM_BOOT_NEXTSTAGE);
> +}
> +
> +void board_init_r(gd_t *id, ulong dest_addr)
> +{
> +	/*
> +	 * Function attribute is no-return
> +	 * This Function never executes
> +	 */

If this function never executes: why is it even implemented here?

> +	while (1)
> +		;
> +}
> diff --git a/configs/evb-rv1108_defconfig b/configs/evb-rv1108_defconfig
> index a59d89e..a650ffd 100644
> --- a/configs/evb-rv1108_defconfig
> +++ b/configs/evb-rv1108_defconfig
> @@ -1,11 +1,19 @@
> CONFIG_ARM=y
> +# CONFIG_SPL_USE_ARCH_MEMCPY is not set
> +# CONFIG_SPL_USE_ARCH_MEMSET is not set
> CONFIG_ARCH_ROCKCHIP=y
> +CONFIG_SPL_LIBGENERIC_SUPPORT=y
> CONFIG_ROCKCHIP_RV1108=y
> +CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
> +CONFIG_SPL_SERIAL_SUPPORT=y
> CONFIG_TARGET_EVB_RV1108=y
> +CONFIG_SPL_STACK_R_ADDR=0x80000
> CONFIG_DEFAULT_DEVICE_TREE="rv1108-evb"
> CONFIG_DEBUG_UART=y
> +CONFIG_SPL_SYS_MALLOC_F_LEN=0x0
> # CONFIG_USE_BOOTCOMMAND is not set
> # CONFIG_DISPLAY_CPUINFO is not set
> +CONFIG_SPL_STACK_R=y
> CONFIG_FASTBOOT_BUF_ADDR=0x62000000
> CONFIG_FASTBOOT_BUF_SIZE=0x08000000
> CONFIG_FASTBOOT_FLASH=y
> @@ -16,6 +24,9 @@ CONFIG_CMD_USB=y
> # CONFIG_CMD_SETEXPR is not set
> CONFIG_CMD_CACHE=y
> CONFIG_CMD_TIME=y
> +# CONFIG_SPL_DOS_PARTITION is not set
> +# CONFIG_SPL_ISO_PARTITION is not set
> +# CONFIG_SPL_EFI_PARTITION is not set
> CONFIG_NET_RANDOM_ETHADDR=y
> CONFIG_REGMAP=y
> CONFIG_SYSCON=y
> @@ -35,9 +46,11 @@ CONFIG_PINCTRL_ROCKCHIP_RV1108=y
> CONFIG_DM_REGULATOR_FIXED=y
> CONFIG_BAUDRATE=1500000
> # CONFIG_SPL_SERIAL_PRESENT is not set
> +# CONFIG_SPL_DM_SERIAL is not set
> CONFIG_DEBUG_UART_BASE=0x10210000
> CONFIG_DEBUG_UART_CLOCK=24000000
> CONFIG_DEBUG_UART_SHIFT=2
> +CONFIG_DEBUG_UART_BOARD_INIT=y
> CONFIG_SYSRESET=y
> CONFIG_USB=y
> CONFIG_USB_EHCI_HCD=y
> @@ -51,4 +64,5 @@ CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
> CONFIG_USB_GADGET_VENDOR_NUM=0x2207
> CONFIG_USB_GADGET_PRODUCT_NUM=0x110a
> CONFIG_USB_GADGET_DWC2_OTG=y
> +CONFIG_SPL_TINY_MEMSET=y
> CONFIG_ERRNO_STR=y
> diff --git a/include/configs/rv1108_common.h b/include/configs/rv1108_common.h
> index 549839d..6ffb684 100644
> --- a/include/configs/rv1108_common.h
> +++ b/include/configs/rv1108_common.h
> @@ -22,6 +22,8 @@
> #define CONFIG_SYS_NS16550_MEM32
> 
> #define CONFIG_SYS_SDRAM_BASE		0x60000000
> +#define SDRAM_MAX_SIZE			0x80000000
> +
> #define CONFIG_NR_DRAM_BANKS		1
> #define CONFIG_SYS_TEXT_BASE		CONFIG_SYS_SDRAM_BASE
> #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_TEXT_BASE + 0x100000)
> @@ -30,4 +32,13 @@
> /* rockchip ohci host driver */
> #define CONFIG_USB_OHCI_NEW
> #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	1
> +
> +/* SPL support */
> +#define CONFIG_SPL_STACK		0x10081ff0
> +#define CONFIG_SPL_TEXT_BASE		0x10080800
> +#define CONFIG_SPL_MAX_SIZE		(0x1100)
> +/*  BSS setup */
> +#define CONFIG_SPL_BSS_START_ADDR	0x10081b00
> +#define CONFIG_SPL_BSS_MAX_SIZE		0x200
> +
> #endif
> -- 
> 2.0.0
> 
>

Patch

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 967290f..b7d3bf1 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -139,6 +139,8 @@  config ROCKCHIP_RK3399
 config ROCKCHIP_RV1108
 	bool "Support Rockchip RV1108"
 	select CPU_V7
+	select SUPPORT_SPL
+	select SPL
 	help
 	  The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7
 	  and a DSP.
diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index e1b0519..5f213b0 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -14,6 +14,7 @@  obj-tpl-$(CONFIG_ROCKCHIP_BROM_HELPER) += bootrom.o
 obj-tpl-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board-tpl.o
 obj-tpl-$(CONFIG_ROCKCHIP_RK3368) += rk3368-board-tpl.o
 
+obj-spl-$(CONFIG_ROCKCHIP_RV1108) += rv1108-board-spl.o
 obj-spl-$(CONFIG_ROCKCHIP_RK3036) += rk3036-board-spl.o
 obj-spl-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board-spl.o
 obj-spl-$(CONFIG_ROCKCHIP_RK322X) += rk322x-board-spl.o
diff --git a/arch/arm/mach-rockchip/rv1108-board-spl.c b/arch/arm/mach-rockchip/rv1108-board-spl.c
new file mode 100644
index 0000000..75ac4e9
--- /dev/null
+++ b/arch/arm/mach-rockchip/rv1108-board-spl.c
@@ -0,0 +1,80 @@ 
+/*
+ * Copyright (C) 2017 Rockchip Electronics Co., Ltd
+ * Author: zhihuan he <huan.he@rock-chips.com>
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <debug_uart.h>
+#include <asm/io.h>
+#include <asm/arch/bootrom.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/sdram.h>
+#include <asm/arch/timer.h>
+#include <asm/arch/grf_rv1108.h>
+#include <asm/arch/sdram_rv1108.h>
+
+#define GRF_BASE		0x10300000
+
+struct rv1108_grf * const grf = (void *)GRF_BASE;
+
+static void write_cntfrq(u32 cntfrq)
+{
+	asm __volatile__ ("mcr p15, 0, %0, c14, c0, 0\n" : : "r"(cntfrq));
+}
+
+void board_timer_init(void)
+{
+	/* Initialize CNTFRQ */
+	write_cntfrq(CONFIG_SYS_TIMER_RATE);
+
+	/* Enable STimer1 for core */
+	rockchip_timer_init();
+}
+
+void board_debug_uart_init(void)
+{
+#if defined(CONFIG_DEBUG_UART_BASE) && (CONFIG_DEBUG_UART_BASE == 0x10230000)
+	rk_clrsetreg(&grf->gpio3a_iomux,	/* UART0 */
+		     GPIO3A6_MASK | GPIO3A5_MASK,
+		     GPIO3A6_UART1_SOUT << GPIO3A6_SHIFT |
+		     GPIO3A5_UART1_SIN << GPIO3A5_SHIFT);
+#else
+	rk_clrsetreg(&grf->gpio2d_iomux,	/* UART2 */
+		     GPIO2D2_MASK | GPIO2D1_MASK,
+		     GPIO2D2_UART2_SOUT_M0 << GPIO2D2_SHIFT |
+		     GPIO2D1_UART2_SIN_M0 << GPIO2D1_SHIFT);
+#endif
+}
+
+void board_init_f(ulong dummy)
+{
+	board_timer_init();
+#define EARLY_UART
+#ifdef EARLY_UART
+	/*
+	 * Debug UART can be used from here if required:
+	 *
+	 * debug_uart_init();
+	 * printch('a');
+	 * printhex8(0x1234);
+	 * printascii("string");
+	 */
+	debug_uart_init();
+	printascii("U-Boot SPL board init\n");
+#endif
+	rv1108_sdram_init();
+	printascii("U-Boot SPL sdram init\n");
+	/* return to maskrom */
+	back_to_bootrom(BROM_BOOT_NEXTSTAGE);
+}
+
+void board_init_r(gd_t *id, ulong dest_addr)
+{
+	/*
+	 * Function attribute is no-return
+	 * This Function never executes
+	 */
+	while (1)
+		;
+}
diff --git a/configs/evb-rv1108_defconfig b/configs/evb-rv1108_defconfig
index a59d89e..a650ffd 100644
--- a/configs/evb-rv1108_defconfig
+++ b/configs/evb-rv1108_defconfig
@@ -1,11 +1,19 @@ 
 CONFIG_ARM=y
+# CONFIG_SPL_USE_ARCH_MEMCPY is not set
+# CONFIG_SPL_USE_ARCH_MEMSET is not set
 CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_ROCKCHIP_RV1108=y
+CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
+CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_TARGET_EVB_RV1108=y
+CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_DEFAULT_DEVICE_TREE="rv1108-evb"
 CONFIG_DEBUG_UART=y
+CONFIG_SPL_SYS_MALLOC_F_LEN=0x0
 # CONFIG_USE_BOOTCOMMAND is not set
 # CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_SPL_STACK_R=y
 CONFIG_FASTBOOT_BUF_ADDR=0x62000000
 CONFIG_FASTBOOT_BUF_SIZE=0x08000000
 CONFIG_FASTBOOT_FLASH=y
@@ -16,6 +24,9 @@  CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_TIME=y
+# CONFIG_SPL_DOS_PARTITION is not set
+# CONFIG_SPL_ISO_PARTITION is not set
+# CONFIG_SPL_EFI_PARTITION is not set
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_REGMAP=y
 CONFIG_SYSCON=y
@@ -35,9 +46,11 @@  CONFIG_PINCTRL_ROCKCHIP_RV1108=y
 CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_BAUDRATE=1500000
 # CONFIG_SPL_SERIAL_PRESENT is not set
+# CONFIG_SPL_DM_SERIAL is not set
 CONFIG_DEBUG_UART_BASE=0x10210000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_SYSRESET=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
@@ -51,4 +64,5 @@  CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
 CONFIG_USB_GADGET_VENDOR_NUM=0x2207
 CONFIG_USB_GADGET_PRODUCT_NUM=0x110a
 CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
diff --git a/include/configs/rv1108_common.h b/include/configs/rv1108_common.h
index 549839d..6ffb684 100644
--- a/include/configs/rv1108_common.h
+++ b/include/configs/rv1108_common.h
@@ -22,6 +22,8 @@ 
 #define CONFIG_SYS_NS16550_MEM32
 
 #define CONFIG_SYS_SDRAM_BASE		0x60000000
+#define SDRAM_MAX_SIZE			0x80000000
+
 #define CONFIG_NR_DRAM_BANKS		1
 #define CONFIG_SYS_TEXT_BASE		CONFIG_SYS_SDRAM_BASE
 #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_TEXT_BASE + 0x100000)
@@ -30,4 +32,13 @@ 
 /* rockchip ohci host driver */
 #define CONFIG_USB_OHCI_NEW
 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	1
+
+/* SPL support */
+#define CONFIG_SPL_STACK		0x10081ff0
+#define CONFIG_SPL_TEXT_BASE		0x10080800
+#define CONFIG_SPL_MAX_SIZE		(0x1100)
+/*  BSS setup */
+#define CONFIG_SPL_BSS_START_ADDR	0x10081b00
+#define CONFIG_SPL_BSS_MAX_SIZE		0x200
+
 #endif