Message ID | 20180111205626.23291-18-f4bug@amsat.org |
---|---|
State | Superseded, archived |
Headers | show |
Series | SDHCI: clean Specs v1/v2, implement Spec v3 | expand |
On Thu, Jan 11, 2018 at 12:56 PM, Philippe Mathieu-Daudé <f4bug@amsat.org> wrote: > Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Alistair > --- > hw/sd/sdhci-internal.h | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/hw/sd/sdhci-internal.h b/hw/sd/sdhci-internal.h > index ac4704eb61..b82e847636 100644 > --- a/hw/sd/sdhci-internal.h > +++ b/hw/sd/sdhci-internal.h > @@ -191,6 +191,10 @@ FIELD(SDHC_HOSTCTL2, V18_ENA, 3, 1); /* UHS-I only */ > FIELD(SDHC_HOSTCTL2, DRIVER_STRENGTH, 4, 2); /* UHS-I only */ > FIELD(SDHC_HOSTCTL2, EXECUTE_TUNING, 6, 1); /* UHS-I only */ > FIELD(SDHC_HOSTCTL2, SAMPLING_CLKSEL, 7, 1); /* UHS-I only */ > +FIELD(SDHC_HOSTCTL2, UHS_II_ENA, 8, 1); /* since v4 */ > +FIELD(SDHC_HOSTCTL2, ADMA2_LENGTH, 10, 1); /* since v4 */ > +FIELD(SDHC_HOSTCTL2, CMD23_ENA, 11, 1); /* since v4 */ > +FIELD(SDHC_HOSTCTL2, VERSION4, 12, 1); /* since v4 */ > FIELD(SDHC_HOSTCTL2, ASYNC_INT, 14, 1); > FIELD(SDHC_HOSTCTL2, PRESET_ENA, 15, 1); > > @@ -219,12 +223,16 @@ FIELD(SDHC_CAPAB, DRIVER_TYPE_C, 37, 1); /* since v3 */ > FIELD(SDHC_CAPAB, DRIVER_TYPE_D, 38, 1); /* since v3 */ > FIELD(SDHC_CAPAB, TIMER_RETUNNING, 40, 4); /* since v3 */ > FIELD(SDHC_CAPAB, SDR50_TUNNING, 45, 1); /* since v3 */ > +FIELD(SDHC_CAPAB, CLK_MUL, 48, 8); /* since v4.20 */ > +FIELD(SDHC_CAPAB, ADMA3, 59, 1); /* since v4.20 */ > +FIELD(SDHC_CAPAB, V18_VDD2, 60, 1); /* since v4.20 */ > > /* HWInit Maximum Current Capabilities Register 0x0 */ > #define SDHC_MAXCURR 0x48 > FIELD(SDHC_MAXCURR, V33_VDD1, 0, 8); > FIELD(SDHC_MAXCURR, V30_VDD1, 8, 8); > FIELD(SDHC_MAXCURR, V18_VDD1, 16, 8); > +FIELD(SDHC_MAXCURR, V18_VDD2, 32, 8); /* since v4.20 */ > > /* W Force Event Auto CMD12 Error Interrupt Register 0x0000 */ > #define SDHC_FEAER 0x50 > -- > 2.15.1 > >
diff --git a/hw/sd/sdhci-internal.h b/hw/sd/sdhci-internal.h index ac4704eb61..b82e847636 100644 --- a/hw/sd/sdhci-internal.h +++ b/hw/sd/sdhci-internal.h @@ -191,6 +191,10 @@ FIELD(SDHC_HOSTCTL2, V18_ENA, 3, 1); /* UHS-I only */ FIELD(SDHC_HOSTCTL2, DRIVER_STRENGTH, 4, 2); /* UHS-I only */ FIELD(SDHC_HOSTCTL2, EXECUTE_TUNING, 6, 1); /* UHS-I only */ FIELD(SDHC_HOSTCTL2, SAMPLING_CLKSEL, 7, 1); /* UHS-I only */ +FIELD(SDHC_HOSTCTL2, UHS_II_ENA, 8, 1); /* since v4 */ +FIELD(SDHC_HOSTCTL2, ADMA2_LENGTH, 10, 1); /* since v4 */ +FIELD(SDHC_HOSTCTL2, CMD23_ENA, 11, 1); /* since v4 */ +FIELD(SDHC_HOSTCTL2, VERSION4, 12, 1); /* since v4 */ FIELD(SDHC_HOSTCTL2, ASYNC_INT, 14, 1); FIELD(SDHC_HOSTCTL2, PRESET_ENA, 15, 1); @@ -219,12 +223,16 @@ FIELD(SDHC_CAPAB, DRIVER_TYPE_C, 37, 1); /* since v3 */ FIELD(SDHC_CAPAB, DRIVER_TYPE_D, 38, 1); /* since v3 */ FIELD(SDHC_CAPAB, TIMER_RETUNNING, 40, 4); /* since v3 */ FIELD(SDHC_CAPAB, SDR50_TUNNING, 45, 1); /* since v3 */ +FIELD(SDHC_CAPAB, CLK_MUL, 48, 8); /* since v4.20 */ +FIELD(SDHC_CAPAB, ADMA3, 59, 1); /* since v4.20 */ +FIELD(SDHC_CAPAB, V18_VDD2, 60, 1); /* since v4.20 */ /* HWInit Maximum Current Capabilities Register 0x0 */ #define SDHC_MAXCURR 0x48 FIELD(SDHC_MAXCURR, V33_VDD1, 0, 8); FIELD(SDHC_MAXCURR, V30_VDD1, 8, 8); FIELD(SDHC_MAXCURR, V18_VDD1, 16, 8); +FIELD(SDHC_MAXCURR, V18_VDD2, 32, 8); /* since v4.20 */ /* W Force Event Auto CMD12 Error Interrupt Register 0x0000 */ #define SDHC_FEAER 0x50
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> --- hw/sd/sdhci-internal.h | 8 ++++++++ 1 file changed, 8 insertions(+)