From patchwork Thu Jan 11 03:03:43 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: yong X-Patchwork-Id: 858753 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3zH9lX4chhz9t3h for ; Thu, 11 Jan 2018 14:07:04 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753843AbeAKDE4 (ORCPT ); Wed, 10 Jan 2018 22:04:56 -0500 Received: from out20-86.mail.aliyun.com ([115.124.20.86]:60276 "EHLO out20-86.mail.aliyun.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753817AbeAKDEy (ORCPT ); Wed, 10 Jan 2018 22:04:54 -0500 X-Alimail-AntiSpam: AC=CONTINUE; BC=0.09731475|-1; CH=green; FP=0|0|0|0|0|-1|-1|-1; HT=e01e01546; MF=yong.deng@magewell.com; NM=1; PH=DS; RN=25; RT=25; SR=0; TI=SMTPD_---.ACpimhf_1515639874; Received: from linuxproject.localdomain(mailfrom:yong.deng@magewell.com fp:58.213.29.2) by smtp.aliyun-inc.com(10.147.40.44); Thu, 11 Jan 2018 11:04:34 +0800 From: Yong Deng To: Maxime Ripard Cc: Mauro Carvalho Chehab , Rob Herring , Mark Rutland , Chen-Yu Tsai , "David S. Miller" , Greg Kroah-Hartman , Randy Dunlap , Hans Verkuil , Stanimir Varbanov , Hugues Fruchet , Yannick Fertre , Philipp Zabel , Arnd Bergmann , Benjamin Gaignard , Ramesh Shanmugasundaram , Sakari Ailus , Rick Chang , linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com, megous@megous.com, Yong Deng Subject: [PATCH v5 1/2] dt-bindings: media: Add Allwinner V3s Camera Sensor Interface (CSI) Date: Thu, 11 Jan 2018 11:03:43 +0800 Message-Id: <1515639823-35782-1-git-send-email-yong.deng@magewell.com> X-Mailer: git-send-email 1.8.3.1 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add binding documentation for Allwinner V3s CSI. Signed-off-by: Yong Deng Reviewed-by: Rob Herring Acked-by: Sakari Ailus --- .../devicetree/bindings/media/sun6i-csi.txt | 59 ++++++++++++++++++++++ 1 file changed, 59 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/sun6i-csi.txt diff --git a/Documentation/devicetree/bindings/media/sun6i-csi.txt b/Documentation/devicetree/bindings/media/sun6i-csi.txt new file mode 100644 index 0000000..2ff47a9 --- /dev/null +++ b/Documentation/devicetree/bindings/media/sun6i-csi.txt @@ -0,0 +1,59 @@ +Allwinner V3s Camera Sensor Interface +------------------------------------- + +Allwinner V3s SoC features two CSI module. CSI0 is used for MIPI CSI-2 +interface and CSI1 is used for parallel interface. + +Required properties: + - compatible: value must be "allwinner,sun8i-v3s-csi" + - reg: base address and size of the memory-mapped region. + - interrupts: interrupt associated to this IP + - clocks: phandles to the clocks feeding the CSI + * bus: the CSI interface clock + * mod: the CSI module clock + * ram: the CSI DRAM clock + - clock-names: the clock names mentioned above + - resets: phandles to the reset line driving the CSI + +Each CSI node should contain one 'port' child node with one child 'endpoint' +node, according to the bindings defined in +Documentation/devicetree/bindings/media/video-interfaces.txt. As mentioned +above, the endpoint's bus type should be MIPI CSI-2 for CSI0 and parallel or +Bt656 for CSI1. + +Endpoint node properties for CSI1 +--------------------------------- + +- remote-endpoint : (required) a phandle to the bus receiver's endpoint + node +- bus-width: : (required) must be 8, 10, 12 or 16 +- pclk-sample : (optional) (default: sample on falling edge) +- hsync-active : (only required for parallel) +- vsync-active : (only required for parallel) + +Example: + +csi1: csi@1cb4000 { + compatible = "allwinner,sun8i-v3s-csi"; + reg = <0x01cb4000 0x1000>; + interrupts = ; + clocks = <&ccu CLK_BUS_CSI>, + <&ccu CLK_CSI1_SCLK>, + <&ccu CLK_DRAM_CSI>; + clock-names = "bus", "mod", "ram"; + resets = <&ccu RST_BUS_CSI>; + + port { + /* Parallel bus endpoint */ + csi1_ep: endpoint { + remote-endpoint = <&adv7611_ep>; + bus-width = <16>; + + /* If hsync-active/vsync-active are missing, + embedded BT.656 sync is used */ + hsync-active = <0>; /* Active low */ + vsync-active = <0>; /* Active low */ + pclk-sample = <1>; /* Rising */ + }; + }; +};