From patchwork Tue Jan 9 07:17:09 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Preetham Chandru Ramchandra X-Patchwork-Id: 857265 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3zG3QB5J6lz9s8J for ; Tue, 9 Jan 2018 18:18:10 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932647AbeAIHSK (ORCPT ); Tue, 9 Jan 2018 02:18:10 -0500 Received: from hqemgate14.nvidia.com ([216.228.121.143]:1485 "EHLO hqemgate14.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752594AbeAIHSJ (ORCPT ); Tue, 9 Jan 2018 02:18:09 -0500 Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqemgate14.nvidia.com id ; Mon, 08 Jan 2018 23:18:00 -0800 Received: from HQMAIL103.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Mon, 08 Jan 2018 23:18:08 -0800 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Mon, 08 Jan 2018 23:18:08 -0800 Received: from HQMAIL109.nvidia.com (172.20.187.15) by HQMAIL103.nvidia.com (172.20.187.11) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Tue, 9 Jan 2018 07:18:08 +0000 Received: from HQMAIL107.nvidia.com (172.20.187.13) by HQMAIL109.nvidia.com (172.20.187.15) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Tue, 9 Jan 2018 07:18:08 +0000 Received: from hqnvemgw02.nvidia.com (172.16.227.111) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server id 15.0.1347.2 via Frontend Transport; Tue, 9 Jan 2018 07:18:08 +0000 Received: from pchandru-pc.nvidia.com (Not Verified[10.24.37.8]) by hqnvemgw02.nvidia.com with Trustwave SEG (v7, 5, 8, 10121) id ; Mon, 08 Jan 2018 23:18:07 -0800 From: Preetham Chandru Ramchandra To: , , CC: , , , , , Preetham Ramchandra Subject: [PATCH V6 2/7] arm64: tegra: Enable AHCI on Jetson TX1 Date: Tue, 9 Jan 2018 12:47:09 +0530 Message-ID: <1515482234-24716-3-git-send-email-pchandru@nvidia.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1515482234-24716-1-git-send-email-pchandru@nvidia.com> References: <1515482234-24716-1-git-send-email-pchandru@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org From: Preetham Ramchandra Signed-off-by: Preetham Chandru R --- v4: * Fixed missing space after 'AUX' --- arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi | 6 ++++++ arch/arm64/boot/dts/nvidia/tegra210.dtsi | 16 ++++++++++++++++ 2 files changed, 22 insertions(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi b/arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi index d67ef4319f3b..2aa2979cd6b5 100644 --- a/arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi @@ -1325,6 +1325,12 @@ status = "okay"; }; + sata@70020000 { + status = "okay"; + phys = <&{/padctl@7009f000/pads/sata/lanes/sata-0}>; + phy-names = "sata-0"; + }; + padctl@7009f000 { status = "okay"; diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi index 9c2402108772..bf72db5386a5 100644 --- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi @@ -798,6 +798,22 @@ #iommu-cells = <1>; }; + sata@70020000 { + compatible = "nvidia,tegra210-ahci"; + reg = <0x0 0x70027000 0x0 0x2000>, /* AHCI */ + <0x0 0x70020000 0x0 0x7000>, /* SATA */ + <0x0 0x70001100 0x0 0x1000>; /* SATA AUX */ + interrupts = ; + clocks = <&tegra_car TEGRA210_CLK_SATA>, + <&tegra_car TEGRA210_CLK_SATA_OOB>; + clock-names = "sata", "sata-oob"; + resets = <&tegra_car 124>, + <&tegra_car 123>, + <&tegra_car 129>; + reset-names = "sata", "sata-oob", "sata-cold"; + status = "disabled"; + }; + hda@70030000 { compatible = "nvidia,tegra210-hda", "nvidia,tegra30-hda"; reg = <0x0 0x70030000 0x0 0x10000>;