From patchwork Sat Mar 5 12:51:45 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adam Lackorzynski X-Patchwork-Id: 85523 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id B6246B70B8 for ; Sat, 5 Mar 2011 23:57:45 +1100 (EST) Received: from localhost ([127.0.0.1]:36248 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Pvr3D-000630-FH for incoming@patchwork.ozlabs.org; Sat, 05 Mar 2011 07:57:39 -0500 Received: from [140.186.70.92] (port=38132 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Pvqxb-0002rH-Ip for qemu-devel@nongnu.org; Sat, 05 Mar 2011 07:51:52 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1PvqxZ-0002zq-F7 for qemu-devel@nongnu.org; Sat, 05 Mar 2011 07:51:51 -0500 Received: from os.inf.tu-dresden.de ([141.76.48.99]:40839) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1PvqxZ-0002zC-9h for qemu-devel@nongnu.org; Sat, 05 Mar 2011 07:51:49 -0500 Received: from erwin.inf.tu-dresden.de ([141.76.48.80] helo=x) by os.inf.tu-dresden.de with esmtp (Exim 4.74) id 1PvqxX-0008Ps-Nl for qemu-devel@nongnu.org; Sat, 05 Mar 2011 13:51:47 +0100 From: Adam Lackorzynski To: qemu-devel@nongnu.org Date: Sat, 5 Mar 2011 13:51:45 +0100 Message-Id: <1299329505-7379-5-git-send-email-adam@os.inf.tu-dresden.de> X-Mailer: git-send-email 1.7.4.1 In-Reply-To: <1299329505-7379-1-git-send-email-adam@os.inf.tu-dresden.de> References: <1299329505-7379-1-git-send-email-adam@os.inf.tu-dresden.de> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 3) X-Received-From: 141.76.48.99 Subject: [Qemu-devel] [PATCH 4/4] target-arm: Integrate secondary CPU reset in arm_boot X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Integrate secondary CPU reset into arm_boot, removing it from realview.c. On non-Linux systems secondary CPUs start with the same entry as the boot CPU. Signed-off-by: Adam Lackorzynski --- hw/arm_boot.c | 23 +++++++++++++++-------- hw/realview.c | 14 -------------- 2 files changed, 15 insertions(+), 22 deletions(-) diff --git a/hw/arm_boot.c b/hw/arm_boot.c index 620550b..41e99d1 100644 --- a/hw/arm_boot.c +++ b/hw/arm_boot.c @@ -175,7 +175,7 @@ static void set_kernel_args_old(struct arm_boot_info *info, } } -static void main_cpu_reset(void *opaque) +static void do_cpu_reset(void *opaque) { CPUState *env = opaque; struct arm_boot_info *info = env->boot_info; @@ -187,16 +187,20 @@ static void main_cpu_reset(void *opaque) env->regs[15] = info->entry & 0xfffffffe; env->thumb = info->entry & 1; } else { - env->regs[15] = info->loader_start; - if (old_param) { - set_kernel_args_old(info, info->initrd_size, + if (env == first_cpu) { + env->regs[15] = info->loader_start; + if (old_param) { + set_kernel_args_old(info, info->initrd_size, + info->loader_start); + } else { + set_kernel_args(info, info->initrd_size, info->loader_start); + } } else { - set_kernel_args(info, info->initrd_size, info->loader_start); + env->regs[15] = info->smp_loader_start; } } } - /* TODO: Reset secondary CPUs. */ } void arm_load_kernel(CPUState *env, struct arm_boot_info *info) @@ -217,7 +221,6 @@ void arm_load_kernel(CPUState *env, struct arm_boot_info *info) if (info->nb_cpus == 0) info->nb_cpus = 1; - env->boot_info = info; #ifdef TARGET_WORDS_BIGENDIAN big_endian = 1; @@ -279,5 +282,9 @@ void arm_load_kernel(CPUState *env, struct arm_boot_info *info) info->initrd_size = initrd_size; } info->is_linux = is_linux; - qemu_register_reset(main_cpu_reset, env); + + for (; env; env = env->next_cpu) { + env->boot_info = info; + qemu_register_reset(do_cpu_reset, env); + } } diff --git a/hw/realview.c b/hw/realview.c index 6eb6c6a..fae444a 100644 --- a/hw/realview.c +++ b/hw/realview.c @@ -104,17 +104,6 @@ static struct arm_boot_info realview_binfo = { .smp_loader_start = SMP_BOOT_ADDR, }; -static void secondary_cpu_reset(void *opaque) -{ - CPUState *env = opaque; - - cpu_reset(env); - /* Set entry point for secondary CPUs. This assumes we're using - the init code from arm_boot.c. Real hardware resets all CPUs - the same. */ - env->regs[15] = SMP_BOOT_ADDR; -} - /* The following two lists must be consistent. */ enum realview_board_type { BOARD_EB, @@ -176,9 +165,6 @@ static void realview_init(ram_addr_t ram_size, } irqp = arm_pic_init_cpu(env); cpu_irq[n] = irqp[ARM_PIC_CPU_IRQ]; - if (n > 0) { - qemu_register_reset(secondary_cpu_reset, env); - } } if (arm_feature(env, ARM_FEATURE_V7)) { if (is_mpcore) {