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[U-Boot] mx6ull: Handle the CONFIG_MX6ULL cases correctly

Message ID 1514845789-374-1-git-send-email-festevam@gmail.com
State Superseded
Delegated to: Stefano Babic
Headers show
Series [U-Boot] mx6ull: Handle the CONFIG_MX6ULL cases correctly | expand

Commit Message

Fabio Estevam Jan. 1, 2018, 10:29 p.m. UTC 
From: Fabio Estevam <fabio.estevam@nxp.com>

Since commit 051ba9e082f7 ("Kconfig: mx6ull: Deselect MX6UL from
CONFIG_MX6ULL") CONFIG_MX6ULL does not select CONFIG_MX6UL anymore, so
take this into consideration in all the checks for CONFIG_MX6UL.

Reported-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
---
 arch/arm/include/asm/arch-mx6/imx-regs.h   | 20 ++++++++++----------
 arch/arm/include/asm/arch-mx6/mx6-ddr.h    |  2 +-
 arch/arm/include/asm/arch-mx6/mx6ul-ddr.h  |  2 +-
 arch/arm/include/asm/mach-imx/iomux-v3.h   |  4 ++--
 arch/arm/include/asm/mach-imx/regs-lcdif.h |  9 ++++++---
 arch/arm/mach-imx/mx6/ddr.c                |  2 +-
 drivers/gpio/mxc_gpio.c                    |  4 ++--
 include/configs/mx6_common.h               |  4 ++--
 8 files changed, 25 insertions(+), 22 deletions(-)

Comments

Stefan Agner Jan. 1, 2018, 11:48 p.m. UTC | #1 
Hi Fabio,

On 2018-01-01 23:29, Fabio Estevam wrote:
> From: Fabio Estevam <fabio.estevam@nxp.com>
> 
> Since commit 051ba9e082f7 ("Kconfig: mx6ull: Deselect MX6UL from
> CONFIG_MX6ULL") CONFIG_MX6ULL does not select CONFIG_MX6UL anymore, so
> take this into consideration in all the checks for CONFIG_MX6UL.

Those changes seem to cover it.

Reviewed-by: Stefan Agner <stefan@agner.ch>

One minor nit below.


> 
> Reported-by: Stefan Agner <stefan@agner.ch>
> Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
> ---
>  arch/arm/include/asm/arch-mx6/imx-regs.h   | 20 ++++++++++----------
>  arch/arm/include/asm/arch-mx6/mx6-ddr.h    |  2 +-
>  arch/arm/include/asm/arch-mx6/mx6ul-ddr.h  |  2 +-
>  arch/arm/include/asm/mach-imx/iomux-v3.h   |  4 ++--
>  arch/arm/include/asm/mach-imx/regs-lcdif.h |  9 ++++++---
>  arch/arm/mach-imx/mx6/ddr.c                |  2 +-
>  drivers/gpio/mxc_gpio.c                    |  4 ++--
>  include/configs/mx6_common.h               |  4 ++--
>  8 files changed, 25 insertions(+), 22 deletions(-)
> 
> diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h
> b/arch/arm/include/asm/arch-mx6/imx-regs.h
> index 7736b6a..8c7ff6a 100644
> --- a/arch/arm/include/asm/arch-mx6/imx-regs.h
> +++ b/arch/arm/include/asm/arch-mx6/imx-regs.h
> @@ -17,7 +17,7 @@
>  #define GPU_2D_ARB_END_ADDR             0x02203FFF
>  #define OPENVG_ARB_BASE_ADDR            0x02204000
>  #define OPENVG_ARB_END_ADDR             0x02207FFF
> -#elif (defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL))
> +#elif (defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) ||
> defined(CONFIG_MX6ULL))
>  #define CAAM_ARB_BASE_ADDR              0x00100000
>  #define CAAM_ARB_END_ADDR               0x00107FFF
>  #define GPU_ARB_BASE_ADDR               0x01800000
> @@ -46,7 +46,7 @@
>  #define MXS_BCH_BASE			(APBH_DMA_ARB_BASE_ADDR + 0x04000)
>  
>  /* GPV - PL301 configuration ports */
> -#if (defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || \
> +#if (defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) ||
> defined(CONFIG_MX6ULL) || \
>  	defined(CONFIG_MX6SL) || defined(CONFIG_MX6SLL))
>  #define GPV2_BASE_ADDR                  0x00D00000
>  #define GPV3_BASE_ADDR			0x00E00000
> @@ -88,7 +88,7 @@
>  #define QSPI0_AMBA_END                 0x6FFFFFFF
>  #define QSPI1_AMBA_BASE                0x70000000
>  #define QSPI1_AMBA_END                 0x7FFFFFFF
> -#elif defined(CONFIG_MX6UL)
> +#elif (defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL))
>  #define WEIM_ARB_BASE_ADDR              0x50000000
>  #define WEIM_ARB_END_ADDR               0x57FFFFFF
>  #define QSPI0_AMBA_BASE                 0x60000000
> @@ -109,7 +109,7 @@
>  #endif
>  
>  #if (defined(CONFIG_MX6SLL) || defined(CONFIG_MX6SL) || \
> -	defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL))
> +	defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL))
>  #define MMDC0_ARB_BASE_ADDR             0x80000000
>  #define MMDC0_ARB_END_ADDR              0xFFFFFFFF
>  #define MMDC1_ARB_BASE_ADDR             0xC0000000
> @@ -262,7 +262,7 @@
>  #define MMDC_P0_BASE_ADDR           (AIPS2_OFF_BASE_ADDR + 0x30000)
>  /* i.MX6SL/SLL */
>  #define RNGB_IPS_BASE_ADDR          (AIPS2_OFF_BASE_ADDR + 0x34000)
> -#ifdef CONFIG_MX6UL
> +#if (defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL))
>  #define ENET2_BASE_ADDR             (AIPS1_OFF_BASE_ADDR + 0x34000)
>  #else
>  /* i.MX6SX */
> @@ -288,7 +288,7 @@
>  #define IP2APB_PERFMON3_BASE_ADDR   (AIPS2_OFF_BASE_ADDR + 0x4C000)
>  #endif
>  #define IP2APB_TZASC1_BASE_ADDR     (AIPS2_OFF_BASE_ADDR + 0x50000)
> -#ifdef CONFIG_MX6UL
> +#if (defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL))
>  #define QSPI0_BASE_ADDR             (AIPS2_OFF_BASE_ADDR + 0x60000)
>  #define UART6_BASE_ADDR             (AIPS2_OFF_BASE_ADDR + 0x7C000)
>  #elif defined(CONFIG_MX6SX)
> @@ -337,7 +337,7 @@
>  #define PWM6_BASE_ADDR              (AIPS3_ARB_BASE_ADDR + 0xA8000)
>  #define PWM7_BASE_ADDR              (AIPS3_ARB_BASE_ADDR + 0xAC000)
>  #define PWM8_BASE_ADDR              (AIPS3_ARB_BASE_ADDR + 0xB0000)
> -#elif defined(CONFIG_MX6ULL)
> +#elif (defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL))
>  #define AIPS3_CONFIG_BASE_ADDR      (AIPS3_ARB_BASE_ADDR + 0x7C000)
>  #define DCP_BASE_ADDR               (AIPS3_ARB_BASE_ADDR + 0x80000)
>  #define RNGB_BASE_ADDR              (AIPS3_ARB_BASE_ADDR + 0x84000)
> @@ -354,7 +354,7 @@
>  #define MX6SX_LCDIF1_BASE_ADDR      (AIPS3_ARB_BASE_ADDR + 0x20000)
>  #define MX6SX_WDOG3_BASE_ADDR       (AIPS3_ARB_BASE_ADDR + 0x88000)
>  
> -#if !(defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || \
> +#if !(defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) ||
> defined(CONFIG_MX6ULL) || \
>  	defined(CONFIG_MX6SLL) || defined(CONFIG_MX6SL))
>  #define IRAM_SIZE                    0x00040000
>  #else
> @@ -573,7 +573,7 @@ struct src {
>  #define IOMUXC_GPR12_LOS_LEVEL			(0x1f << 4)
>  
>  struct iomuxc {
> -#if (defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL))
> +#if (defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL))
>  	u8 reserved[0x4000];
>  #endif
>  	u32 gpr[14];
> @@ -700,7 +700,7 @@ struct cspi_regs {
>  #define MXC_CSPICON_SSPOL	12 /* SS polarity */
>  #define MXC_CSPICON_CTL		20 /* inactive state of SCLK */
>  #if defined(CONFIG_MX6SLL) || defined(CONFIG_MX6SL) || \
> -	defined(CONFIG_MX6DL) || defined(CONFIG_MX6UL)
> +	defined(CONFIG_MX6DL) || defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL)
>  #define MXC_SPI_BASE_ADDRESSES \
>  	ECSPI1_BASE_ADDR, \
>  	ECSPI2_BASE_ADDR, \
> diff --git a/arch/arm/include/asm/arch-mx6/mx6-ddr.h
> b/arch/arm/include/asm/arch-mx6/mx6-ddr.h
> index 2a8d443..19d2f1d 100644
> --- a/arch/arm/include/asm/arch-mx6/mx6-ddr.h
> +++ b/arch/arm/include/asm/arch-mx6/mx6-ddr.h
> @@ -16,7 +16,7 @@
>  #ifdef CONFIG_MX6SX
>  #include "mx6sx-ddr.h"
>  #else
> -#ifdef CONFIG_MX6UL
> +#if defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL)
>  #include "mx6ul-ddr.h"
>  #else
>  #ifdef CONFIG_MX6SL
> diff --git a/arch/arm/include/asm/arch-mx6/mx6ul-ddr.h
> b/arch/arm/include/asm/arch-mx6/mx6ul-ddr.h
> index ed11c4b..518b812 100644
> --- a/arch/arm/include/asm/arch-mx6/mx6ul-ddr.h
> +++ b/arch/arm/include/asm/arch-mx6/mx6ul-ddr.h
> @@ -7,7 +7,7 @@
>  #ifndef __ASM_ARCH_MX6UL_DDR_H__
>  #define __ASM_ARCH_MX6UL_DDR_H__
>  
> -#ifndef CONFIG_MX6UL
> +#if !(defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL))
>  #error "wrong CPU"
>  #endif
>  
> diff --git a/arch/arm/include/asm/mach-imx/iomux-v3.h
> b/arch/arm/include/asm/mach-imx/iomux-v3.h
> index ad35e01..9fba8d1 100644
> --- a/arch/arm/include/asm/mach-imx/iomux-v3.h
> +++ b/arch/arm/include/asm/mach-imx/iomux-v3.h
> @@ -127,7 +127,7 @@ typedef u64 iomux_v3_cfg_t;
>  
>  #define PAD_CTL_ODE		(1 << 11)
>  
> -#if defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL)
> +#if defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL)
>  #define PAD_CTL_SPEED_LOW	(0 << 6)
>  #else
>  #define PAD_CTL_SPEED_LOW	(1 << 6)
> @@ -253,7 +253,7 @@ if (is_cpu_type(MXC_CPU_MX6Q) ||
> is_cpu_type(MXC_CPU_MX6D)) {				\
>  	imx_iomux_v3_setup_pad(MX6Q_##def);
>  #define SETUP_IOMUX_PADS(x)					\
>  	imx_iomux_v3_setup_multiple_pads(x, ARRAY_SIZE(x))
> -#elif defined(CONFIG_MX6UL)
> +#elif defined(CONFIG_MX6UL)|| defined(CONFIG_MX6ULL)
>  #define IOMUX_PADS(x) MX6_##x
>  #define SETUP_IOMUX_PAD(def)					\
>  	imx_iomux_v3_setup_pad(MX6_##def);
> diff --git a/arch/arm/include/asm/mach-imx/regs-lcdif.h
> b/arch/arm/include/asm/mach-imx/regs-lcdif.h
> index 4de401b..17ae503 100644
> --- a/arch/arm/include/asm/mach-imx/regs-lcdif.h
> +++ b/arch/arm/include/asm/mach-imx/regs-lcdif.h
> @@ -20,7 +20,8 @@ struct mxs_lcdif_regs {
>  	mxs_reg_32(hw_lcdif_ctrl)		/* 0x00 */
>  	mxs_reg_32(hw_lcdif_ctrl1)		/* 0x10 */
>  #if defined(CONFIG_MX28) || defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || \
> -	defined(CONFIG_MX7) || defined(CONFIG_MX6SL) || defined(CONFIG_MX6SLL)
> +	defined(CONFIG_MX7) || defined(CONFIG_MX6SL) || defined(CONFIG_MX6SLL) || \
> +	defined(CONFIG_MX6ULL)

I would rather prefer to introduce a somewhat decent ordering here, e.g.

#if defined(CONFIG_MX28) || defined(CONFIG_MX6SX) || \
	defined(CONFIG_MX6SL) || defined(CONFIG_MX6SLL) || \
	defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL) || \
	defined(CONFIG_MX7)

>  	mxs_reg_32(hw_lcdif_ctrl2)		/* 0x20 */
>  #endif
>  	mxs_reg_32(hw_lcdif_transfer_count)	/* 0x20/0x30 */
> @@ -56,7 +57,9 @@ struct mxs_lcdif_regs {
>  	mxs_reg_32(hw_lcdif_data)		/* 0x1b0/0x180 */
>  	mxs_reg_32(hw_lcdif_bm_error_stat)	/* 0x1c0/0x190 */
>  #if defined(CONFIG_MX28) || defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || \
> -	defined(CONFIG_MX7) || defined(CONFIG_MX6SL) || defined(CONFIG_MX6SLL)
> +	defined(CONFIG_MX7) || defined(CONFIG_MX6SL) || defined(CONFIG_MX6SLL) || \
> +	defined(CONFIG_MX6ULL)
> +

dito

>  	mxs_reg_32(hw_lcdif_crc_stat)		/* 0x1a0 */
>  #endif
>  	mxs_reg_32(hw_lcdif_lcdif_stat)		/* 0x1d0/0x1b0 */
> @@ -65,7 +68,7 @@ struct mxs_lcdif_regs {
>  	mxs_reg_32(hw_lcdif_debug1)		/* 0x200/0x1e0 */
>  	mxs_reg_32(hw_lcdif_debug2)		/* 0x1f0 */
>  #if defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || defined(CONFIG_MX7) || \
> -	defined(CONFIG_MX6SL) || defined(CONFIG_MX6SLL)
> +	defined(CONFIG_MX6SL) || defined(CONFIG_MX6SLL) || defined(CONFIG_MX6ULL)

dito

>  	mxs_reg_32(hw_lcdif_thres)
>  	mxs_reg_32(hw_lcdif_as_ctrl)
>  	mxs_reg_32(hw_lcdif_as_buf)
> diff --git a/arch/arm/mach-imx/mx6/ddr.c b/arch/arm/mach-imx/mx6/ddr.c
> index 0cf391e..52a9a25 100644
> --- a/arch/arm/mach-imx/mx6/ddr.c
> +++ b/arch/arm/mach-imx/mx6/ddr.c
> @@ -631,7 +631,7 @@ void mx6sx_dram_iocfg(unsigned width,
>  }
>  #endif
>  
> -#ifdef CONFIG_MX6UL
> +#if defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL)
>  void mx6ul_dram_iocfg(unsigned width,
>  		      const struct mx6ul_iomux_ddr_regs *ddr,
>  		      const struct mx6ul_iomux_grp_regs *grp)
> diff --git a/drivers/gpio/mxc_gpio.c b/drivers/gpio/mxc_gpio.c
> index c480eba..cfa620b 100644
> --- a/drivers/gpio/mxc_gpio.c
> +++ b/drivers/gpio/mxc_gpio.c
> @@ -47,12 +47,12 @@ static unsigned long gpio_ports[] = {
>  #if defined(CONFIG_MX27) || defined(CONFIG_MX53) || defined(CONFIG_MX6) || \
>  		defined(CONFIG_MX7)
>  	[4] = GPIO5_BASE_ADDR,
> -#ifndef CONFIG_MX6UL
> +#if !(defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL))
>  	[5] = GPIO6_BASE_ADDR,
>  #endif
>  #endif
>  #if defined(CONFIG_MX53) || defined(CONFIG_MX6) || defined(CONFIG_MX7)
> -#ifndef CONFIG_MX6UL
> +#if !(defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL))
>  	[6] = GPIO7_BASE_ADDR,
>  #endif
>  #endif
> diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common.h
> index 5fb85a1..f72c7ed 100644
> --- a/include/configs/mx6_common.h
> +++ b/include/configs/mx6_common.h
> @@ -7,7 +7,7 @@
>  #ifndef __MX6_COMMON_H
>  #define __MX6_COMMON_H
>  
> -#ifndef CONFIG_MX6UL
> +#if !(defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL))
>  #ifndef CONFIG_SYS_L2CACHE_OFF
>  #define CONFIG_SYS_L2_PL310
>  #define CONFIG_SYS_PL310_BASE	L2_PL310_BASE
> @@ -38,7 +38,7 @@
>  
>  /* Boot options */
>  #if (defined(CONFIG_MX6SX) || defined(CONFIG_MX6SL) || \
> -	defined(CONFIG_MX6UL) || defined(CONFIG_MX6SLL))
> +	defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL)|| defined(CONFIG_MX6SLL))

And maybe here too.

--
Stefan

>  #define CONFIG_LOADADDR		0x82000000
>  #ifndef CONFIG_SYS_TEXT_BASE
>  #define CONFIG_SYS_TEXT_BASE	0x87800000
Stefan Agner Jan. 2, 2018, 12:01 a.m. UTC | #2 
On 2018-01-01 23:29, Fabio Estevam wrote:
> From: Fabio Estevam <fabio.estevam@nxp.com>
> 
> Since commit 051ba9e082f7 ("Kconfig: mx6ull: Deselect MX6UL from
> CONFIG_MX6ULL") CONFIG_MX6ULL does not select CONFIG_MX6UL anymore, so
> take this into consideration in all the checks for CONFIG_MX6UL.

Found one more:

--- a/arch/arm/mach-imx/mx6/Kconfig
+++ b/arch/arm/mach-imx/mx6/Kconfig
@@ -8,7 +8,7 @@ config MX6_SMP
        bool
 
 config MX6
-       select ARM_ERRATA_743622 if !MX6UL
+       select ARM_ERRATA_743622 if !MX6UL && ! MX6ULL
        bool
        default y
        imply CMD_FUSE


--
Stefan

> 
> Reported-by: Stefan Agner <stefan@agner.ch>
> Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
> ---
>  arch/arm/include/asm/arch-mx6/imx-regs.h   | 20 ++++++++++----------
>  arch/arm/include/asm/arch-mx6/mx6-ddr.h    |  2 +-
>  arch/arm/include/asm/arch-mx6/mx6ul-ddr.h  |  2 +-
>  arch/arm/include/asm/mach-imx/iomux-v3.h   |  4 ++--
>  arch/arm/include/asm/mach-imx/regs-lcdif.h |  9 ++++++---
>  arch/arm/mach-imx/mx6/ddr.c                |  2 +-
>  drivers/gpio/mxc_gpio.c                    |  4 ++--
>  include/configs/mx6_common.h               |  4 ++--
>  8 files changed, 25 insertions(+), 22 deletions(-)
> 
> diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h
> b/arch/arm/include/asm/arch-mx6/imx-regs.h
> index 7736b6a..8c7ff6a 100644
> --- a/arch/arm/include/asm/arch-mx6/imx-regs.h
> +++ b/arch/arm/include/asm/arch-mx6/imx-regs.h
> @@ -17,7 +17,7 @@
>  #define GPU_2D_ARB_END_ADDR             0x02203FFF
>  #define OPENVG_ARB_BASE_ADDR            0x02204000
>  #define OPENVG_ARB_END_ADDR             0x02207FFF
> -#elif (defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL))
> +#elif (defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) ||
> defined(CONFIG_MX6ULL))
>  #define CAAM_ARB_BASE_ADDR              0x00100000
>  #define CAAM_ARB_END_ADDR               0x00107FFF
>  #define GPU_ARB_BASE_ADDR               0x01800000
> @@ -46,7 +46,7 @@
>  #define MXS_BCH_BASE			(APBH_DMA_ARB_BASE_ADDR + 0x04000)
>  
>  /* GPV - PL301 configuration ports */
> -#if (defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || \
> +#if (defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) ||
> defined(CONFIG_MX6ULL) || \
>  	defined(CONFIG_MX6SL) || defined(CONFIG_MX6SLL))
>  #define GPV2_BASE_ADDR                  0x00D00000
>  #define GPV3_BASE_ADDR			0x00E00000
> @@ -88,7 +88,7 @@
>  #define QSPI0_AMBA_END                 0x6FFFFFFF
>  #define QSPI1_AMBA_BASE                0x70000000
>  #define QSPI1_AMBA_END                 0x7FFFFFFF
> -#elif defined(CONFIG_MX6UL)
> +#elif (defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL))
>  #define WEIM_ARB_BASE_ADDR              0x50000000
>  #define WEIM_ARB_END_ADDR               0x57FFFFFF
>  #define QSPI0_AMBA_BASE                 0x60000000
> @@ -109,7 +109,7 @@
>  #endif
>  
>  #if (defined(CONFIG_MX6SLL) || defined(CONFIG_MX6SL) || \
> -	defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL))
> +	defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL))
>  #define MMDC0_ARB_BASE_ADDR             0x80000000
>  #define MMDC0_ARB_END_ADDR              0xFFFFFFFF
>  #define MMDC1_ARB_BASE_ADDR             0xC0000000
> @@ -262,7 +262,7 @@
>  #define MMDC_P0_BASE_ADDR           (AIPS2_OFF_BASE_ADDR + 0x30000)
>  /* i.MX6SL/SLL */
>  #define RNGB_IPS_BASE_ADDR          (AIPS2_OFF_BASE_ADDR + 0x34000)
> -#ifdef CONFIG_MX6UL
> +#if (defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL))
>  #define ENET2_BASE_ADDR             (AIPS1_OFF_BASE_ADDR + 0x34000)
>  #else
>  /* i.MX6SX */
> @@ -288,7 +288,7 @@
>  #define IP2APB_PERFMON3_BASE_ADDR   (AIPS2_OFF_BASE_ADDR + 0x4C000)
>  #endif
>  #define IP2APB_TZASC1_BASE_ADDR     (AIPS2_OFF_BASE_ADDR + 0x50000)
> -#ifdef CONFIG_MX6UL
> +#if (defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL))
>  #define QSPI0_BASE_ADDR             (AIPS2_OFF_BASE_ADDR + 0x60000)
>  #define UART6_BASE_ADDR             (AIPS2_OFF_BASE_ADDR + 0x7C000)
>  #elif defined(CONFIG_MX6SX)
> @@ -337,7 +337,7 @@
>  #define PWM6_BASE_ADDR              (AIPS3_ARB_BASE_ADDR + 0xA8000)
>  #define PWM7_BASE_ADDR              (AIPS3_ARB_BASE_ADDR + 0xAC000)
>  #define PWM8_BASE_ADDR              (AIPS3_ARB_BASE_ADDR + 0xB0000)
> -#elif defined(CONFIG_MX6ULL)
> +#elif (defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL))
>  #define AIPS3_CONFIG_BASE_ADDR      (AIPS3_ARB_BASE_ADDR + 0x7C000)
>  #define DCP_BASE_ADDR               (AIPS3_ARB_BASE_ADDR + 0x80000)
>  #define RNGB_BASE_ADDR              (AIPS3_ARB_BASE_ADDR + 0x84000)
> @@ -354,7 +354,7 @@
>  #define MX6SX_LCDIF1_BASE_ADDR      (AIPS3_ARB_BASE_ADDR + 0x20000)
>  #define MX6SX_WDOG3_BASE_ADDR       (AIPS3_ARB_BASE_ADDR + 0x88000)
>  
> -#if !(defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || \
> +#if !(defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) ||
> defined(CONFIG_MX6ULL) || \
>  	defined(CONFIG_MX6SLL) || defined(CONFIG_MX6SL))
>  #define IRAM_SIZE                    0x00040000
>  #else
> @@ -573,7 +573,7 @@ struct src {
>  #define IOMUXC_GPR12_LOS_LEVEL			(0x1f << 4)
>  
>  struct iomuxc {
> -#if (defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL))
> +#if (defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL))
>  	u8 reserved[0x4000];
>  #endif
>  	u32 gpr[14];
> @@ -700,7 +700,7 @@ struct cspi_regs {
>  #define MXC_CSPICON_SSPOL	12 /* SS polarity */
>  #define MXC_CSPICON_CTL		20 /* inactive state of SCLK */
>  #if defined(CONFIG_MX6SLL) || defined(CONFIG_MX6SL) || \
> -	defined(CONFIG_MX6DL) || defined(CONFIG_MX6UL)
> +	defined(CONFIG_MX6DL) || defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL)
>  #define MXC_SPI_BASE_ADDRESSES \
>  	ECSPI1_BASE_ADDR, \
>  	ECSPI2_BASE_ADDR, \
> diff --git a/arch/arm/include/asm/arch-mx6/mx6-ddr.h
> b/arch/arm/include/asm/arch-mx6/mx6-ddr.h
> index 2a8d443..19d2f1d 100644
> --- a/arch/arm/include/asm/arch-mx6/mx6-ddr.h
> +++ b/arch/arm/include/asm/arch-mx6/mx6-ddr.h
> @@ -16,7 +16,7 @@
>  #ifdef CONFIG_MX6SX
>  #include "mx6sx-ddr.h"
>  #else
> -#ifdef CONFIG_MX6UL
> +#if defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL)
>  #include "mx6ul-ddr.h"
>  #else
>  #ifdef CONFIG_MX6SL
> diff --git a/arch/arm/include/asm/arch-mx6/mx6ul-ddr.h
> b/arch/arm/include/asm/arch-mx6/mx6ul-ddr.h
> index ed11c4b..518b812 100644
> --- a/arch/arm/include/asm/arch-mx6/mx6ul-ddr.h
> +++ b/arch/arm/include/asm/arch-mx6/mx6ul-ddr.h
> @@ -7,7 +7,7 @@
>  #ifndef __ASM_ARCH_MX6UL_DDR_H__
>  #define __ASM_ARCH_MX6UL_DDR_H__
>  
> -#ifndef CONFIG_MX6UL
> +#if !(defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL))
>  #error "wrong CPU"
>  #endif
>  
> diff --git a/arch/arm/include/asm/mach-imx/iomux-v3.h
> b/arch/arm/include/asm/mach-imx/iomux-v3.h
> index ad35e01..9fba8d1 100644
> --- a/arch/arm/include/asm/mach-imx/iomux-v3.h
> +++ b/arch/arm/include/asm/mach-imx/iomux-v3.h
> @@ -127,7 +127,7 @@ typedef u64 iomux_v3_cfg_t;
>  
>  #define PAD_CTL_ODE		(1 << 11)
>  
> -#if defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL)
> +#if defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL)
>  #define PAD_CTL_SPEED_LOW	(0 << 6)
>  #else
>  #define PAD_CTL_SPEED_LOW	(1 << 6)
> @@ -253,7 +253,7 @@ if (is_cpu_type(MXC_CPU_MX6Q) ||
> is_cpu_type(MXC_CPU_MX6D)) {				\
>  	imx_iomux_v3_setup_pad(MX6Q_##def);
>  #define SETUP_IOMUX_PADS(x)					\
>  	imx_iomux_v3_setup_multiple_pads(x, ARRAY_SIZE(x))
> -#elif defined(CONFIG_MX6UL)
> +#elif defined(CONFIG_MX6UL)|| defined(CONFIG_MX6ULL)
>  #define IOMUX_PADS(x) MX6_##x
>  #define SETUP_IOMUX_PAD(def)					\
>  	imx_iomux_v3_setup_pad(MX6_##def);
> diff --git a/arch/arm/include/asm/mach-imx/regs-lcdif.h
> b/arch/arm/include/asm/mach-imx/regs-lcdif.h
> index 4de401b..17ae503 100644
> --- a/arch/arm/include/asm/mach-imx/regs-lcdif.h
> +++ b/arch/arm/include/asm/mach-imx/regs-lcdif.h
> @@ -20,7 +20,8 @@ struct mxs_lcdif_regs {
>  	mxs_reg_32(hw_lcdif_ctrl)		/* 0x00 */
>  	mxs_reg_32(hw_lcdif_ctrl1)		/* 0x10 */
>  #if defined(CONFIG_MX28) || defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || \
> -	defined(CONFIG_MX7) || defined(CONFIG_MX6SL) || defined(CONFIG_MX6SLL)
> +	defined(CONFIG_MX7) || defined(CONFIG_MX6SL) || defined(CONFIG_MX6SLL) || \
> +	defined(CONFIG_MX6ULL)
>  	mxs_reg_32(hw_lcdif_ctrl2)		/* 0x20 */
>  #endif
>  	mxs_reg_32(hw_lcdif_transfer_count)	/* 0x20/0x30 */
> @@ -56,7 +57,9 @@ struct mxs_lcdif_regs {
>  	mxs_reg_32(hw_lcdif_data)		/* 0x1b0/0x180 */
>  	mxs_reg_32(hw_lcdif_bm_error_stat)	/* 0x1c0/0x190 */
>  #if defined(CONFIG_MX28) || defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || \
> -	defined(CONFIG_MX7) || defined(CONFIG_MX6SL) || defined(CONFIG_MX6SLL)
> +	defined(CONFIG_MX7) || defined(CONFIG_MX6SL) || defined(CONFIG_MX6SLL) || \
> +	defined(CONFIG_MX6ULL)
> +
>  	mxs_reg_32(hw_lcdif_crc_stat)		/* 0x1a0 */
>  #endif
>  	mxs_reg_32(hw_lcdif_lcdif_stat)		/* 0x1d0/0x1b0 */
> @@ -65,7 +68,7 @@ struct mxs_lcdif_regs {
>  	mxs_reg_32(hw_lcdif_debug1)		/* 0x200/0x1e0 */
>  	mxs_reg_32(hw_lcdif_debug2)		/* 0x1f0 */
>  #if defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || defined(CONFIG_MX7) || \
> -	defined(CONFIG_MX6SL) || defined(CONFIG_MX6SLL)
> +	defined(CONFIG_MX6SL) || defined(CONFIG_MX6SLL) || defined(CONFIG_MX6ULL)
>  	mxs_reg_32(hw_lcdif_thres)
>  	mxs_reg_32(hw_lcdif_as_ctrl)
>  	mxs_reg_32(hw_lcdif_as_buf)
> diff --git a/arch/arm/mach-imx/mx6/ddr.c b/arch/arm/mach-imx/mx6/ddr.c
> index 0cf391e..52a9a25 100644
> --- a/arch/arm/mach-imx/mx6/ddr.c
> +++ b/arch/arm/mach-imx/mx6/ddr.c
> @@ -631,7 +631,7 @@ void mx6sx_dram_iocfg(unsigned width,
>  }
>  #endif
>  
> -#ifdef CONFIG_MX6UL
> +#if defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL)
>  void mx6ul_dram_iocfg(unsigned width,
>  		      const struct mx6ul_iomux_ddr_regs *ddr,
>  		      const struct mx6ul_iomux_grp_regs *grp)
> diff --git a/drivers/gpio/mxc_gpio.c b/drivers/gpio/mxc_gpio.c
> index c480eba..cfa620b 100644
> --- a/drivers/gpio/mxc_gpio.c
> +++ b/drivers/gpio/mxc_gpio.c
> @@ -47,12 +47,12 @@ static unsigned long gpio_ports[] = {
>  #if defined(CONFIG_MX27) || defined(CONFIG_MX53) || defined(CONFIG_MX6) || \
>  		defined(CONFIG_MX7)
>  	[4] = GPIO5_BASE_ADDR,
> -#ifndef CONFIG_MX6UL
> +#if !(defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL))
>  	[5] = GPIO6_BASE_ADDR,
>  #endif
>  #endif
>  #if defined(CONFIG_MX53) || defined(CONFIG_MX6) || defined(CONFIG_MX7)
> -#ifndef CONFIG_MX6UL
> +#if !(defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL))
>  	[6] = GPIO7_BASE_ADDR,
>  #endif
>  #endif
> diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common.h
> index 5fb85a1..f72c7ed 100644
> --- a/include/configs/mx6_common.h
> +++ b/include/configs/mx6_common.h
> @@ -7,7 +7,7 @@
>  #ifndef __MX6_COMMON_H
>  #define __MX6_COMMON_H
>  
> -#ifndef CONFIG_MX6UL
> +#if !(defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL))
>  #ifndef CONFIG_SYS_L2CACHE_OFF
>  #define CONFIG_SYS_L2_PL310
>  #define CONFIG_SYS_PL310_BASE	L2_PL310_BASE
> @@ -38,7 +38,7 @@
>  
>  /* Boot options */
>  #if (defined(CONFIG_MX6SX) || defined(CONFIG_MX6SL) || \
> -	defined(CONFIG_MX6UL) || defined(CONFIG_MX6SLL))
> +	defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL)|| defined(CONFIG_MX6SLL))
>  #define CONFIG_LOADADDR		0x82000000
>  #ifndef CONFIG_SYS_TEXT_BASE
>  #define CONFIG_SYS_TEXT_BASE	0x87800000
Fabio Estevam Jan. 2, 2018, 12:18 a.m. UTC | #3 
On Mon, Jan 1, 2018 at 10:01 PM, Stefan Agner <stefan@agner.ch> wrote:

> Found one more:

Thanks, Stefan. Sent a v2 with your feedback into account.
Stefano Babic Jan. 3, 2018, 1:20 p.m. UTC | #4 
Hi Fabio,

On 01/01/2018 23:29, Fabio Estevam wrote:
> From: Fabio Estevam <fabio.estevam@nxp.com>
> 
> Since commit 051ba9e082f7 ("Kconfig: mx6ull: Deselect MX6UL from
> CONFIG_MX6ULL") CONFIG_MX6ULL does not select CONFIG_MX6UL anymore, so
> take this into consideration in all the checks for CONFIG_MX6UL.
> 

Thanks for fixing this.

What about include/configs/imx6_spl.h:

 #if defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || defined(CONFIG_MX6SL)
 #define CONFIG_SPL_BSS_START_ADDR      0x88200000
 #define CONFIG_SPL_BSS_MAX_SIZE        0x100000         /* 1 MB */

There is not currently mainlined ULL boards with SPL, but I would fix
this, too.

Best regards,
Stefano


> Reported-by: Stefan Agner <stefan@agner.ch>
> Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
> ---
>  arch/arm/include/asm/arch-mx6/imx-regs.h   | 20 ++++++++++----------
>  arch/arm/include/asm/arch-mx6/mx6-ddr.h    |  2 +-
>  arch/arm/include/asm/arch-mx6/mx6ul-ddr.h  |  2 +-
>  arch/arm/include/asm/mach-imx/iomux-v3.h   |  4 ++--
>  arch/arm/include/asm/mach-imx/regs-lcdif.h |  9 ++++++---
>  arch/arm/mach-imx/mx6/ddr.c                |  2 +-
>  drivers/gpio/mxc_gpio.c                    |  4 ++--
>  include/configs/mx6_common.h               |  4 ++--
>  8 files changed, 25 insertions(+), 22 deletions(-)
> 
> diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h
> index 7736b6a..8c7ff6a 100644
> --- a/arch/arm/include/asm/arch-mx6/imx-regs.h
> +++ b/arch/arm/include/asm/arch-mx6/imx-regs.h
> @@ -17,7 +17,7 @@
>  #define GPU_2D_ARB_END_ADDR             0x02203FFF
>  #define OPENVG_ARB_BASE_ADDR            0x02204000
>  #define OPENVG_ARB_END_ADDR             0x02207FFF
> -#elif (defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL))
> +#elif (defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL))
>  #define CAAM_ARB_BASE_ADDR              0x00100000
>  #define CAAM_ARB_END_ADDR               0x00107FFF
>  #define GPU_ARB_BASE_ADDR               0x01800000
> @@ -46,7 +46,7 @@
>  #define MXS_BCH_BASE			(APBH_DMA_ARB_BASE_ADDR + 0x04000)
>  
>  /* GPV - PL301 configuration ports */
> -#if (defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || \
> +#if (defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL) || \
>  	defined(CONFIG_MX6SL) || defined(CONFIG_MX6SLL))
>  #define GPV2_BASE_ADDR                  0x00D00000
>  #define GPV3_BASE_ADDR			0x00E00000
> @@ -88,7 +88,7 @@
>  #define QSPI0_AMBA_END                 0x6FFFFFFF
>  #define QSPI1_AMBA_BASE                0x70000000
>  #define QSPI1_AMBA_END                 0x7FFFFFFF
> -#elif defined(CONFIG_MX6UL)
> +#elif (defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL))
>  #define WEIM_ARB_BASE_ADDR              0x50000000
>  #define WEIM_ARB_END_ADDR               0x57FFFFFF
>  #define QSPI0_AMBA_BASE                 0x60000000
> @@ -109,7 +109,7 @@
>  #endif
>  
>  #if (defined(CONFIG_MX6SLL) || defined(CONFIG_MX6SL) || \
> -	defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL))
> +	defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL))
>  #define MMDC0_ARB_BASE_ADDR             0x80000000
>  #define MMDC0_ARB_END_ADDR              0xFFFFFFFF
>  #define MMDC1_ARB_BASE_ADDR             0xC0000000
> @@ -262,7 +262,7 @@
>  #define MMDC_P0_BASE_ADDR           (AIPS2_OFF_BASE_ADDR + 0x30000)
>  /* i.MX6SL/SLL */
>  #define RNGB_IPS_BASE_ADDR          (AIPS2_OFF_BASE_ADDR + 0x34000)
> -#ifdef CONFIG_MX6UL
> +#if (defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL))
>  #define ENET2_BASE_ADDR             (AIPS1_OFF_BASE_ADDR + 0x34000)
>  #else
>  /* i.MX6SX */
> @@ -288,7 +288,7 @@
>  #define IP2APB_PERFMON3_BASE_ADDR   (AIPS2_OFF_BASE_ADDR + 0x4C000)
>  #endif
>  #define IP2APB_TZASC1_BASE_ADDR     (AIPS2_OFF_BASE_ADDR + 0x50000)
> -#ifdef CONFIG_MX6UL
> +#if (defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL))
>  #define QSPI0_BASE_ADDR             (AIPS2_OFF_BASE_ADDR + 0x60000)
>  #define UART6_BASE_ADDR             (AIPS2_OFF_BASE_ADDR + 0x7C000)
>  #elif defined(CONFIG_MX6SX)
> @@ -337,7 +337,7 @@
>  #define PWM6_BASE_ADDR              (AIPS3_ARB_BASE_ADDR + 0xA8000)
>  #define PWM7_BASE_ADDR              (AIPS3_ARB_BASE_ADDR + 0xAC000)
>  #define PWM8_BASE_ADDR              (AIPS3_ARB_BASE_ADDR + 0xB0000)
> -#elif defined(CONFIG_MX6ULL)
> +#elif (defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL))
>  #define AIPS3_CONFIG_BASE_ADDR      (AIPS3_ARB_BASE_ADDR + 0x7C000)
>  #define DCP_BASE_ADDR               (AIPS3_ARB_BASE_ADDR + 0x80000)
>  #define RNGB_BASE_ADDR              (AIPS3_ARB_BASE_ADDR + 0x84000)
> @@ -354,7 +354,7 @@
>  #define MX6SX_LCDIF1_BASE_ADDR      (AIPS3_ARB_BASE_ADDR + 0x20000)
>  #define MX6SX_WDOG3_BASE_ADDR       (AIPS3_ARB_BASE_ADDR + 0x88000)
>  
> -#if !(defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || \
> +#if !(defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL) || \
>  	defined(CONFIG_MX6SLL) || defined(CONFIG_MX6SL))
>  #define IRAM_SIZE                    0x00040000
>  #else
> @@ -573,7 +573,7 @@ struct src {
>  #define IOMUXC_GPR12_LOS_LEVEL			(0x1f << 4)
>  
>  struct iomuxc {
> -#if (defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL))
> +#if (defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL))
>  	u8 reserved[0x4000];
>  #endif
>  	u32 gpr[14];
> @@ -700,7 +700,7 @@ struct cspi_regs {
>  #define MXC_CSPICON_SSPOL	12 /* SS polarity */
>  #define MXC_CSPICON_CTL		20 /* inactive state of SCLK */
>  #if defined(CONFIG_MX6SLL) || defined(CONFIG_MX6SL) || \
> -	defined(CONFIG_MX6DL) || defined(CONFIG_MX6UL)
> +	defined(CONFIG_MX6DL) || defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL)
>  #define MXC_SPI_BASE_ADDRESSES \
>  	ECSPI1_BASE_ADDR, \
>  	ECSPI2_BASE_ADDR, \
> diff --git a/arch/arm/include/asm/arch-mx6/mx6-ddr.h b/arch/arm/include/asm/arch-mx6/mx6-ddr.h
> index 2a8d443..19d2f1d 100644
> --- a/arch/arm/include/asm/arch-mx6/mx6-ddr.h
> +++ b/arch/arm/include/asm/arch-mx6/mx6-ddr.h
> @@ -16,7 +16,7 @@
>  #ifdef CONFIG_MX6SX
>  #include "mx6sx-ddr.h"
>  #else
> -#ifdef CONFIG_MX6UL
> +#if defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL)
>  #include "mx6ul-ddr.h"
>  #else
>  #ifdef CONFIG_MX6SL
> diff --git a/arch/arm/include/asm/arch-mx6/mx6ul-ddr.h b/arch/arm/include/asm/arch-mx6/mx6ul-ddr.h
> index ed11c4b..518b812 100644
> --- a/arch/arm/include/asm/arch-mx6/mx6ul-ddr.h
> +++ b/arch/arm/include/asm/arch-mx6/mx6ul-ddr.h
> @@ -7,7 +7,7 @@
>  #ifndef __ASM_ARCH_MX6UL_DDR_H__
>  #define __ASM_ARCH_MX6UL_DDR_H__
>  
> -#ifndef CONFIG_MX6UL
> +#if !(defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL))
>  #error "wrong CPU"
>  #endif
>  
> diff --git a/arch/arm/include/asm/mach-imx/iomux-v3.h b/arch/arm/include/asm/mach-imx/iomux-v3.h
> index ad35e01..9fba8d1 100644
> --- a/arch/arm/include/asm/mach-imx/iomux-v3.h
> +++ b/arch/arm/include/asm/mach-imx/iomux-v3.h
> @@ -127,7 +127,7 @@ typedef u64 iomux_v3_cfg_t;
>  
>  #define PAD_CTL_ODE		(1 << 11)
>  
> -#if defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL)
> +#if defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL)
>  #define PAD_CTL_SPEED_LOW	(0 << 6)
>  #else
>  #define PAD_CTL_SPEED_LOW	(1 << 6)
> @@ -253,7 +253,7 @@ if (is_cpu_type(MXC_CPU_MX6Q) || is_cpu_type(MXC_CPU_MX6D)) {				\
>  	imx_iomux_v3_setup_pad(MX6Q_##def);
>  #define SETUP_IOMUX_PADS(x)					\
>  	imx_iomux_v3_setup_multiple_pads(x, ARRAY_SIZE(x))
> -#elif defined(CONFIG_MX6UL)
> +#elif defined(CONFIG_MX6UL)|| defined(CONFIG_MX6ULL)
>  #define IOMUX_PADS(x) MX6_##x
>  #define SETUP_IOMUX_PAD(def)					\
>  	imx_iomux_v3_setup_pad(MX6_##def);
> diff --git a/arch/arm/include/asm/mach-imx/regs-lcdif.h b/arch/arm/include/asm/mach-imx/regs-lcdif.h
> index 4de401b..17ae503 100644
> --- a/arch/arm/include/asm/mach-imx/regs-lcdif.h
> +++ b/arch/arm/include/asm/mach-imx/regs-lcdif.h
> @@ -20,7 +20,8 @@ struct mxs_lcdif_regs {
>  	mxs_reg_32(hw_lcdif_ctrl)		/* 0x00 */
>  	mxs_reg_32(hw_lcdif_ctrl1)		/* 0x10 */
>  #if defined(CONFIG_MX28) || defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || \
> -	defined(CONFIG_MX7) || defined(CONFIG_MX6SL) || defined(CONFIG_MX6SLL)
> +	defined(CONFIG_MX7) || defined(CONFIG_MX6SL) || defined(CONFIG_MX6SLL) || \
> +	defined(CONFIG_MX6ULL)
>  	mxs_reg_32(hw_lcdif_ctrl2)		/* 0x20 */
>  #endif
>  	mxs_reg_32(hw_lcdif_transfer_count)	/* 0x20/0x30 */
> @@ -56,7 +57,9 @@ struct mxs_lcdif_regs {
>  	mxs_reg_32(hw_lcdif_data)		/* 0x1b0/0x180 */
>  	mxs_reg_32(hw_lcdif_bm_error_stat)	/* 0x1c0/0x190 */
>  #if defined(CONFIG_MX28) || defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || \
> -	defined(CONFIG_MX7) || defined(CONFIG_MX6SL) || defined(CONFIG_MX6SLL)
> +	defined(CONFIG_MX7) || defined(CONFIG_MX6SL) || defined(CONFIG_MX6SLL) || \
> +	defined(CONFIG_MX6ULL)
> +
>  	mxs_reg_32(hw_lcdif_crc_stat)		/* 0x1a0 */
>  #endif
>  	mxs_reg_32(hw_lcdif_lcdif_stat)		/* 0x1d0/0x1b0 */
> @@ -65,7 +68,7 @@ struct mxs_lcdif_regs {
>  	mxs_reg_32(hw_lcdif_debug1)		/* 0x200/0x1e0 */
>  	mxs_reg_32(hw_lcdif_debug2)		/* 0x1f0 */
>  #if defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || defined(CONFIG_MX7) || \
> -	defined(CONFIG_MX6SL) || defined(CONFIG_MX6SLL)
> +	defined(CONFIG_MX6SL) || defined(CONFIG_MX6SLL) || defined(CONFIG_MX6ULL)
>  	mxs_reg_32(hw_lcdif_thres)
>  	mxs_reg_32(hw_lcdif_as_ctrl)
>  	mxs_reg_32(hw_lcdif_as_buf)
> diff --git a/arch/arm/mach-imx/mx6/ddr.c b/arch/arm/mach-imx/mx6/ddr.c
> index 0cf391e..52a9a25 100644
> --- a/arch/arm/mach-imx/mx6/ddr.c
> +++ b/arch/arm/mach-imx/mx6/ddr.c
> @@ -631,7 +631,7 @@ void mx6sx_dram_iocfg(unsigned width,
>  }
>  #endif
>  
> -#ifdef CONFIG_MX6UL
> +#if defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL)
>  void mx6ul_dram_iocfg(unsigned width,
>  		      const struct mx6ul_iomux_ddr_regs *ddr,
>  		      const struct mx6ul_iomux_grp_regs *grp)
> diff --git a/drivers/gpio/mxc_gpio.c b/drivers/gpio/mxc_gpio.c
> index c480eba..cfa620b 100644
> --- a/drivers/gpio/mxc_gpio.c
> +++ b/drivers/gpio/mxc_gpio.c
> @@ -47,12 +47,12 @@ static unsigned long gpio_ports[] = {
>  #if defined(CONFIG_MX27) || defined(CONFIG_MX53) || defined(CONFIG_MX6) || \
>  		defined(CONFIG_MX7)
>  	[4] = GPIO5_BASE_ADDR,
> -#ifndef CONFIG_MX6UL
> +#if !(defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL))
>  	[5] = GPIO6_BASE_ADDR,
>  #endif
>  #endif
>  #if defined(CONFIG_MX53) || defined(CONFIG_MX6) || defined(CONFIG_MX7)
> -#ifndef CONFIG_MX6UL
> +#if !(defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL))
>  	[6] = GPIO7_BASE_ADDR,
>  #endif
>  #endif
> diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common.h
> index 5fb85a1..f72c7ed 100644
> --- a/include/configs/mx6_common.h
> +++ b/include/configs/mx6_common.h
> @@ -7,7 +7,7 @@
>  #ifndef __MX6_COMMON_H
>  #define __MX6_COMMON_H
>  
> -#ifndef CONFIG_MX6UL
> +#if !(defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL))
>  #ifndef CONFIG_SYS_L2CACHE_OFF
>  #define CONFIG_SYS_L2_PL310
>  #define CONFIG_SYS_PL310_BASE	L2_PL310_BASE
> @@ -38,7 +38,7 @@
>  
>  /* Boot options */
>  #if (defined(CONFIG_MX6SX) || defined(CONFIG_MX6SL) || \
> -	defined(CONFIG_MX6UL) || defined(CONFIG_MX6SLL))
> +	defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL)|| defined(CONFIG_MX6SLL))
>  #define CONFIG_LOADADDR		0x82000000
>  #ifndef CONFIG_SYS_TEXT_BASE
>  #define CONFIG_SYS_TEXT_BASE	0x87800000
>
Fabio Estevam Jan. 4, 2018, 9:33 a.m. UTC | #5 
Hi Stefano,

On Wed, Jan 3, 2018 at 11:20 AM, Stefano Babic <sbabic@denx.de> wrote:

> Thanks for fixing this.
>
> What about include/configs/imx6_spl.h:
>
>  #if defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || defined(CONFIG_MX6SL)
>  #define CONFIG_SPL_BSS_START_ADDR      0x88200000
>  #define CONFIG_SPL_BSS_MAX_SIZE        0x100000         /* 1 MB */
>
> There is not currently mainlined ULL boards with SPL, but I would fix
> this, too.

Yes, I sent v3 with this fix.

Thanks
diff mbox series

Patch

diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h
index 7736b6a..8c7ff6a 100644
--- a/arch/arm/include/asm/arch-mx6/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx6/imx-regs.h
@@ -17,7 +17,7 @@ 
 #define GPU_2D_ARB_END_ADDR             0x02203FFF
 #define OPENVG_ARB_BASE_ADDR            0x02204000
 #define OPENVG_ARB_END_ADDR             0x02207FFF
-#elif (defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL))
+#elif (defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL))
 #define CAAM_ARB_BASE_ADDR              0x00100000
 #define CAAM_ARB_END_ADDR               0x00107FFF
 #define GPU_ARB_BASE_ADDR               0x01800000
@@ -46,7 +46,7 @@ 
 #define MXS_BCH_BASE			(APBH_DMA_ARB_BASE_ADDR + 0x04000)
 
 /* GPV - PL301 configuration ports */
-#if (defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || \
+#if (defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL) || \
 	defined(CONFIG_MX6SL) || defined(CONFIG_MX6SLL))
 #define GPV2_BASE_ADDR                  0x00D00000
 #define GPV3_BASE_ADDR			0x00E00000
@@ -88,7 +88,7 @@ 
 #define QSPI0_AMBA_END                 0x6FFFFFFF
 #define QSPI1_AMBA_BASE                0x70000000
 #define QSPI1_AMBA_END                 0x7FFFFFFF
-#elif defined(CONFIG_MX6UL)
+#elif (defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL))
 #define WEIM_ARB_BASE_ADDR              0x50000000
 #define WEIM_ARB_END_ADDR               0x57FFFFFF
 #define QSPI0_AMBA_BASE                 0x60000000
@@ -109,7 +109,7 @@ 
 #endif
 
 #if (defined(CONFIG_MX6SLL) || defined(CONFIG_MX6SL) || \
-	defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL))
+	defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL))
 #define MMDC0_ARB_BASE_ADDR             0x80000000
 #define MMDC0_ARB_END_ADDR              0xFFFFFFFF
 #define MMDC1_ARB_BASE_ADDR             0xC0000000
@@ -262,7 +262,7 @@ 
 #define MMDC_P0_BASE_ADDR           (AIPS2_OFF_BASE_ADDR + 0x30000)
 /* i.MX6SL/SLL */
 #define RNGB_IPS_BASE_ADDR          (AIPS2_OFF_BASE_ADDR + 0x34000)
-#ifdef CONFIG_MX6UL
+#if (defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL))
 #define ENET2_BASE_ADDR             (AIPS1_OFF_BASE_ADDR + 0x34000)
 #else
 /* i.MX6SX */
@@ -288,7 +288,7 @@ 
 #define IP2APB_PERFMON3_BASE_ADDR   (AIPS2_OFF_BASE_ADDR + 0x4C000)
 #endif
 #define IP2APB_TZASC1_BASE_ADDR     (AIPS2_OFF_BASE_ADDR + 0x50000)
-#ifdef CONFIG_MX6UL
+#if (defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL))
 #define QSPI0_BASE_ADDR             (AIPS2_OFF_BASE_ADDR + 0x60000)
 #define UART6_BASE_ADDR             (AIPS2_OFF_BASE_ADDR + 0x7C000)
 #elif defined(CONFIG_MX6SX)
@@ -337,7 +337,7 @@ 
 #define PWM6_BASE_ADDR              (AIPS3_ARB_BASE_ADDR + 0xA8000)
 #define PWM7_BASE_ADDR              (AIPS3_ARB_BASE_ADDR + 0xAC000)
 #define PWM8_BASE_ADDR              (AIPS3_ARB_BASE_ADDR + 0xB0000)
-#elif defined(CONFIG_MX6ULL)
+#elif (defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL))
 #define AIPS3_CONFIG_BASE_ADDR      (AIPS3_ARB_BASE_ADDR + 0x7C000)
 #define DCP_BASE_ADDR               (AIPS3_ARB_BASE_ADDR + 0x80000)
 #define RNGB_BASE_ADDR              (AIPS3_ARB_BASE_ADDR + 0x84000)
@@ -354,7 +354,7 @@ 
 #define MX6SX_LCDIF1_BASE_ADDR      (AIPS3_ARB_BASE_ADDR + 0x20000)
 #define MX6SX_WDOG3_BASE_ADDR       (AIPS3_ARB_BASE_ADDR + 0x88000)
 
-#if !(defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || \
+#if !(defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL) || \
 	defined(CONFIG_MX6SLL) || defined(CONFIG_MX6SL))
 #define IRAM_SIZE                    0x00040000
 #else
@@ -573,7 +573,7 @@  struct src {
 #define IOMUXC_GPR12_LOS_LEVEL			(0x1f << 4)
 
 struct iomuxc {
-#if (defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL))
+#if (defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL))
 	u8 reserved[0x4000];
 #endif
 	u32 gpr[14];
@@ -700,7 +700,7 @@  struct cspi_regs {
 #define MXC_CSPICON_SSPOL	12 /* SS polarity */
 #define MXC_CSPICON_CTL		20 /* inactive state of SCLK */
 #if defined(CONFIG_MX6SLL) || defined(CONFIG_MX6SL) || \
-	defined(CONFIG_MX6DL) || defined(CONFIG_MX6UL)
+	defined(CONFIG_MX6DL) || defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL)
 #define MXC_SPI_BASE_ADDRESSES \
 	ECSPI1_BASE_ADDR, \
 	ECSPI2_BASE_ADDR, \
diff --git a/arch/arm/include/asm/arch-mx6/mx6-ddr.h b/arch/arm/include/asm/arch-mx6/mx6-ddr.h
index 2a8d443..19d2f1d 100644
--- a/arch/arm/include/asm/arch-mx6/mx6-ddr.h
+++ b/arch/arm/include/asm/arch-mx6/mx6-ddr.h
@@ -16,7 +16,7 @@ 
 #ifdef CONFIG_MX6SX
 #include "mx6sx-ddr.h"
 #else
-#ifdef CONFIG_MX6UL
+#if defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL)
 #include "mx6ul-ddr.h"
 #else
 #ifdef CONFIG_MX6SL
diff --git a/arch/arm/include/asm/arch-mx6/mx6ul-ddr.h b/arch/arm/include/asm/arch-mx6/mx6ul-ddr.h
index ed11c4b..518b812 100644
--- a/arch/arm/include/asm/arch-mx6/mx6ul-ddr.h
+++ b/arch/arm/include/asm/arch-mx6/mx6ul-ddr.h
@@ -7,7 +7,7 @@ 
 #ifndef __ASM_ARCH_MX6UL_DDR_H__
 #define __ASM_ARCH_MX6UL_DDR_H__
 
-#ifndef CONFIG_MX6UL
+#if !(defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL))
 #error "wrong CPU"
 #endif
 
diff --git a/arch/arm/include/asm/mach-imx/iomux-v3.h b/arch/arm/include/asm/mach-imx/iomux-v3.h
index ad35e01..9fba8d1 100644
--- a/arch/arm/include/asm/mach-imx/iomux-v3.h
+++ b/arch/arm/include/asm/mach-imx/iomux-v3.h
@@ -127,7 +127,7 @@  typedef u64 iomux_v3_cfg_t;
 
 #define PAD_CTL_ODE		(1 << 11)
 
-#if defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL)
+#if defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL)
 #define PAD_CTL_SPEED_LOW	(0 << 6)
 #else
 #define PAD_CTL_SPEED_LOW	(1 << 6)
@@ -253,7 +253,7 @@  if (is_cpu_type(MXC_CPU_MX6Q) || is_cpu_type(MXC_CPU_MX6D)) {				\
 	imx_iomux_v3_setup_pad(MX6Q_##def);
 #define SETUP_IOMUX_PADS(x)					\
 	imx_iomux_v3_setup_multiple_pads(x, ARRAY_SIZE(x))
-#elif defined(CONFIG_MX6UL)
+#elif defined(CONFIG_MX6UL)|| defined(CONFIG_MX6ULL)
 #define IOMUX_PADS(x) MX6_##x
 #define SETUP_IOMUX_PAD(def)					\
 	imx_iomux_v3_setup_pad(MX6_##def);
diff --git a/arch/arm/include/asm/mach-imx/regs-lcdif.h b/arch/arm/include/asm/mach-imx/regs-lcdif.h
index 4de401b..17ae503 100644
--- a/arch/arm/include/asm/mach-imx/regs-lcdif.h
+++ b/arch/arm/include/asm/mach-imx/regs-lcdif.h
@@ -20,7 +20,8 @@  struct mxs_lcdif_regs {
 	mxs_reg_32(hw_lcdif_ctrl)		/* 0x00 */
 	mxs_reg_32(hw_lcdif_ctrl1)		/* 0x10 */
 #if defined(CONFIG_MX28) || defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || \
-	defined(CONFIG_MX7) || defined(CONFIG_MX6SL) || defined(CONFIG_MX6SLL)
+	defined(CONFIG_MX7) || defined(CONFIG_MX6SL) || defined(CONFIG_MX6SLL) || \
+	defined(CONFIG_MX6ULL)
 	mxs_reg_32(hw_lcdif_ctrl2)		/* 0x20 */
 #endif
 	mxs_reg_32(hw_lcdif_transfer_count)	/* 0x20/0x30 */
@@ -56,7 +57,9 @@  struct mxs_lcdif_regs {
 	mxs_reg_32(hw_lcdif_data)		/* 0x1b0/0x180 */
 	mxs_reg_32(hw_lcdif_bm_error_stat)	/* 0x1c0/0x190 */
 #if defined(CONFIG_MX28) || defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || \
-	defined(CONFIG_MX7) || defined(CONFIG_MX6SL) || defined(CONFIG_MX6SLL)
+	defined(CONFIG_MX7) || defined(CONFIG_MX6SL) || defined(CONFIG_MX6SLL) || \
+	defined(CONFIG_MX6ULL)
+
 	mxs_reg_32(hw_lcdif_crc_stat)		/* 0x1a0 */
 #endif
 	mxs_reg_32(hw_lcdif_lcdif_stat)		/* 0x1d0/0x1b0 */
@@ -65,7 +68,7 @@  struct mxs_lcdif_regs {
 	mxs_reg_32(hw_lcdif_debug1)		/* 0x200/0x1e0 */
 	mxs_reg_32(hw_lcdif_debug2)		/* 0x1f0 */
 #if defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || defined(CONFIG_MX7) || \
-	defined(CONFIG_MX6SL) || defined(CONFIG_MX6SLL)
+	defined(CONFIG_MX6SL) || defined(CONFIG_MX6SLL) || defined(CONFIG_MX6ULL)
 	mxs_reg_32(hw_lcdif_thres)
 	mxs_reg_32(hw_lcdif_as_ctrl)
 	mxs_reg_32(hw_lcdif_as_buf)
diff --git a/arch/arm/mach-imx/mx6/ddr.c b/arch/arm/mach-imx/mx6/ddr.c
index 0cf391e..52a9a25 100644
--- a/arch/arm/mach-imx/mx6/ddr.c
+++ b/arch/arm/mach-imx/mx6/ddr.c
@@ -631,7 +631,7 @@  void mx6sx_dram_iocfg(unsigned width,
 }
 #endif
 
-#ifdef CONFIG_MX6UL
+#if defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL)
 void mx6ul_dram_iocfg(unsigned width,
 		      const struct mx6ul_iomux_ddr_regs *ddr,
 		      const struct mx6ul_iomux_grp_regs *grp)
diff --git a/drivers/gpio/mxc_gpio.c b/drivers/gpio/mxc_gpio.c
index c480eba..cfa620b 100644
--- a/drivers/gpio/mxc_gpio.c
+++ b/drivers/gpio/mxc_gpio.c
@@ -47,12 +47,12 @@  static unsigned long gpio_ports[] = {
 #if defined(CONFIG_MX27) || defined(CONFIG_MX53) || defined(CONFIG_MX6) || \
 		defined(CONFIG_MX7)
 	[4] = GPIO5_BASE_ADDR,
-#ifndef CONFIG_MX6UL
+#if !(defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL))
 	[5] = GPIO6_BASE_ADDR,
 #endif
 #endif
 #if defined(CONFIG_MX53) || defined(CONFIG_MX6) || defined(CONFIG_MX7)
-#ifndef CONFIG_MX6UL
+#if !(defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL))
 	[6] = GPIO7_BASE_ADDR,
 #endif
 #endif
diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common.h
index 5fb85a1..f72c7ed 100644
--- a/include/configs/mx6_common.h
+++ b/include/configs/mx6_common.h
@@ -7,7 +7,7 @@ 
 #ifndef __MX6_COMMON_H
 #define __MX6_COMMON_H
 
-#ifndef CONFIG_MX6UL
+#if !(defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL))
 #ifndef CONFIG_SYS_L2CACHE_OFF
 #define CONFIG_SYS_L2_PL310
 #define CONFIG_SYS_PL310_BASE	L2_PL310_BASE
@@ -38,7 +38,7 @@ 
 
 /* Boot options */
 #if (defined(CONFIG_MX6SX) || defined(CONFIG_MX6SL) || \
-	defined(CONFIG_MX6UL) || defined(CONFIG_MX6SLL))
+	defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL)|| defined(CONFIG_MX6SLL))
 #define CONFIG_LOADADDR		0x82000000
 #ifndef CONFIG_SYS_TEXT_BASE
 #define CONFIG_SYS_TEXT_BASE	0x87800000