From patchwork Fri Dec 29 11:41:30 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Raghavendra, Vignesh" X-Patchwork-Id: 853873 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.b="P/4Z1anH"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3z7Q4D1tKKz9s7G for ; Fri, 29 Dec 2017 22:54:36 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755718AbdL2LyY (ORCPT ); Fri, 29 Dec 2017 06:54:24 -0500 Received: from fllnx209.ext.ti.com ([198.47.19.16]:35590 "EHLO fllnx209.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755708AbdL2LyX (ORCPT ); Fri, 29 Dec 2017 06:54:23 -0500 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by fllnx209.ext.ti.com (8.15.1/8.15.1) with ESMTP id vBTBrmZ1032333; Fri, 29 Dec 2017 05:53:48 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1514548429; bh=mgNddwpeOcfm7Ubyba2MTLRfalPBYqeRubTvmnCOGiA=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=P/4Z1anH636bA6EOVgx8LSMEtwWtPRPwUWlbl6qvV9rydElPaPD+CdxDq+nMmuuLt xx8RZfDjUiIdU0l0pqMbw1q3aKGHEncEGnhV91OQ9IdiGWVMzOP2NJW6ktiTsrdM/Z 1/aD+LFNQwni32jlICeL1GsolocPTr443V+jOkbM= Received: from DLEE103.ent.ti.com (dlee103.ent.ti.com [157.170.170.33]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id vBTBrhKK012715; Fri, 29 Dec 2017 05:53:43 -0600 Received: from DLEE111.ent.ti.com (157.170.170.22) by DLEE103.ent.ti.com (157.170.170.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1261.35; Fri, 29 Dec 2017 05:53:43 -0600 Received: from dlep33.itg.ti.com (157.170.170.75) by DLEE111.ent.ti.com (157.170.170.22) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1261.35 via Frontend Transport; Fri, 29 Dec 2017 05:53:43 -0600 Received: from a0132425.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id vBTBrcaj024499; Fri, 29 Dec 2017 05:53:41 -0600 From: Vignesh R To: Lorenzo Pieralisi CC: Kishon Vijay Abraham I , Bjorn Helgaas , , , , Vignesh R Subject: [PATCH v2 1/2] PCI: dra7xx: Fix legacy INTD IRQ handling Date: Fri, 29 Dec 2017 17:11:30 +0530 Message-ID: <20171229114131.22296-2-vigneshr@ti.com> X-Mailer: git-send-email 2.15.1 In-Reply-To: <20171229114131.22296-1-vigneshr@ti.com> References: <20171229114131.22296-1-vigneshr@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Legacy INTD IRQ handling is broken on dra7xx due to fact that driver uses hwirq in range of 1-4 for INTA, INTD whereas IRQ domain is of size 4 which is numbered 0-3. Therefore when INTD IRQ line is used with pci-dra7xx driver following warning is seen: WARNING: CPU: 0 PID: 1 at kernel/irq/irqdomain.c:342 irq_domain_associate+0x12c/0x1c4 error: hwirq 0x4 is too large for dummy Fix this by using pci_irqd_intx_xlate() helper to translate the INTx 1-4 range into the 0-3 as done in other PCIe drivers. Suggested-by: Bjorn Helgaas Reported-by: Chris Welch Signed-off-by: Vignesh R Acked-by: Kishon Vijay Abraham I --- drivers/pci/dwc/pci-dra7xx.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/pci/dwc/pci-dra7xx.c b/drivers/pci/dwc/pci-dra7xx.c index 58aed0896468..892f93910012 100644 --- a/drivers/pci/dwc/pci-dra7xx.c +++ b/drivers/pci/dwc/pci-dra7xx.c @@ -226,6 +226,7 @@ static int dra7xx_pcie_intx_map(struct irq_domain *domain, unsigned int irq, static const struct irq_domain_ops intx_domain_ops = { .map = dra7xx_pcie_intx_map, + .xlate = pci_irqd_intx_xlate, }; static int dra7xx_pcie_init_irq_domain(struct pcie_port *pp) @@ -269,7 +270,7 @@ static irqreturn_t dra7xx_pcie_msi_irq_handler(int irq, void *arg) case INTC: case INTD: generic_handle_irq(irq_find_mapping(dra7xx->irq_domain, - ffs(reg))); + ffs(reg) - 1)); break; }