From patchwork Wed Dec 20 11:32:23 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guillaume Tucker X-Patchwork-Id: 851410 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3z1t1b0fP2z9s7g for ; Wed, 20 Dec 2017 22:33:07 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754885AbdLTLdF (ORCPT ); Wed, 20 Dec 2017 06:33:05 -0500 Received: from bhuna.collabora.co.uk ([46.235.227.227]:41086 "EHLO bhuna.collabora.co.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754349AbdLTLdE (ORCPT ); Wed, 20 Dec 2017 06:33:04 -0500 Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: gtucker) with ESMTPSA id 493882717FE From: Guillaume Tucker To: Thierry Reding , Jon Hunter , David Airlie Cc: linux-tegra@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Guillaume Tucker Subject: [RFC PATCH v2 1/1] drm/tegra: sor: Fix hang on tegra124 due to NULL clk_out Date: Wed, 20 Dec 2017 11:32:23 +0000 Message-Id: <0f776b7500ee0e74b316b9803803b309779d2ff7.1513768618.git.guillaume.tucker@collabora.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: References: In-Reply-To: References: Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org When neither HDMI nor DP is supported such as on the tegra124, the sor->clk_out is not initialised and remains NULL. In this case, the parent clock can't be assigned to it so revert to the previous behaviour of assigning it to the main sor->clk instead. This fixes a kernel hang on tegra124 and should also affect tegra210 as they both don't support HDMI and DP. Tested on tegra124 only. Fixes: e1335e2f0cfc ("drm/tegra: sor: Reimplement pad clock") Signed-off-by: Guillaume Tucker CC: Thierry Reding Tested-by: Jon Hunter --- drivers/gpu/drm/tegra/sor.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/tegra/sor.c b/drivers/gpu/drm/tegra/sor.c index b0a1dedac802..a344f66d4ecb 100644 --- a/drivers/gpu/drm/tegra/sor.c +++ b/drivers/gpu/drm/tegra/sor.c @@ -255,7 +255,7 @@ static int tegra_sor_set_parent_clock(struct tegra_sor *sor, struct clk *parent) clk_disable_unprepare(sor->clk); - err = clk_set_parent(sor->clk_out, parent); + err = clk_set_parent(sor->clk_out ? sor->clk_out : sor->clk, parent); if (err < 0) return err;