From patchwork Tue Dec 19 09:31:32 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 850733 X-Patchwork-Delegate: lorenzo.pieralisi@arm.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.b="zLNEbQaZ"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3z1CNy4mg8z9s72 for ; Tue, 19 Dec 2017 20:32:34 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S938906AbdLSJcc (ORCPT ); Tue, 19 Dec 2017 04:32:32 -0500 Received: from lelnx193.ext.ti.com ([198.47.27.77]:15661 "EHLO lelnx193.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932998AbdLSJc2 (ORCPT ); Tue, 19 Dec 2017 04:32:28 -0500 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by lelnx193.ext.ti.com (8.15.1/8.15.1) with ESMTP id vBJ9W8us030849; Tue, 19 Dec 2017 03:32:08 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1513675928; bh=ffMgXh0vFbhjdKgoqtnyM8PHzyr3806FINH08/axUvQ=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=zLNEbQaZUK8rc0syaVBj9ChjGXW/7SMcBkQqM+9oULCnBN+c6+CqkovupJWz+HiKY wt8s9xztCyud9igiIJMe285wOqLdbr6hTBecIqYoYj511tP0borNPSLgA7rPqxt8u3 VmbYPZE7pp9cx2hKzuGDwRl5tXGZ1tEY5JJh+YX4= Received: from DLEE110.ent.ti.com (dlee110.ent.ti.com [157.170.170.21]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id vBJ9W8AE015704; Tue, 19 Dec 2017 03:32:08 -0600 Received: from DLEE107.ent.ti.com (157.170.170.37) by DLEE110.ent.ti.com (157.170.170.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1261.35; Tue, 19 Dec 2017 03:32:07 -0600 Received: from dflp33.itg.ti.com (10.64.6.16) by DLEE107.ent.ti.com (157.170.170.37) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1261.35 via Frontend Transport; Tue, 19 Dec 2017 03:32:07 -0600 Received: from a0393678ub.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id vBJ9VgI1012627; Tue, 19 Dec 2017 03:32:04 -0600 From: Kishon Vijay Abraham I To: Tony Lindgren , CC: Rob Herring , Mark Rutland , Russell King , , , , , , , Subject: [PATCH 6/7] ARM: omap2plus_defconfig: Enable CONFIG_PCI_DRA7XX (Host & Device modes) Date: Tue, 19 Dec 2017 15:01:32 +0530 Message-ID: <20171219093133.16565-7-kishon@ti.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20171219093133.16565-1-kishon@ti.com> References: <20171219093133.16565-1-kishon@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Enable CONFIG_PCI_DRA7XX in order to be able to configure PCIe controller present in dra7 SoCs in both host mode and device mode. Signed-off-by: Kishon Vijay Abraham I --- arch/arm/configs/omap2plus_defconfig | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm/configs/omap2plus_defconfig b/arch/arm/configs/omap2plus_defconfig index 7b97200c1d64..a01871d5aa73 100644 --- a/arch/arm/configs/omap2plus_defconfig +++ b/arch/arm/configs/omap2plus_defconfig @@ -48,6 +48,13 @@ CONFIG_SOC_AM43XX=y CONFIG_SOC_DRA7XX=y CONFIG_ARM_THUMBEE=y CONFIG_ARM_ERRATA_411920=y +CONFIG_PCI=y +CONFIG_PCI_MSI=y +CONFIG_PCI_DRA7XX=y +CONFIG_PCI_DRA7XX_EP=y +CONFIG_PCI_ENDPOINT=y +CONFIG_PCI_ENDPOINT_CONFIGFS=y +CONFIG_PCI_EPF_TEST=m CONFIG_SMP=y CONFIG_NR_CPUS=2 CONFIG_CMA=y @@ -137,6 +144,7 @@ CONFIG_BLK_DEV_RAM=y CONFIG_BLK_DEV_RAM_SIZE=16384 CONFIG_SENSORS_TSL2550=m CONFIG_SRAM=y +CONFIG_PCI_ENDPOINT_TEST=m CONFIG_EEPROM_AT24=m CONFIG_BLK_DEV_SD=y CONFIG_SCSI_SCAN_ASYNC=y