Message ID | 20171218101629.31395-1-p.zabel@pengutronix.de |
---|---|
State | Not Applicable, archived |
Headers | show |
Series | [v2,1/2] media: dt-bindings: coda: Add compatible for CodaHx4 on i.MX51 | expand |
On Mon, Dec 18, 2017 at 8:16 AM, Philipp Zabel <p.zabel@pengutronix.de> wrote: > Add support for the CodaHx4 VPU used on i.MX51. > > Decoding h.264, MPEG-4, and MPEG-2 video works, as well as encoding > h.264. MPEG-4 encoding is not enabled, it currently produces visual > artifacts. > > Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/Documentation/devicetree/bindings/media/coda.txt b/Documentation/devicetree/bindings/media/coda.txt index 2865d04e40305..90eb74cc1993f 100644 --- a/Documentation/devicetree/bindings/media/coda.txt +++ b/Documentation/devicetree/bindings/media/coda.txt @@ -7,8 +7,9 @@ called VPU (Video Processing Unit). Required properties: - compatible : should be "fsl,<chip>-src" for i.MX SoCs: (a) "fsl,imx27-vpu" for CodaDx6 present in i.MX27 - (b) "fsl,imx53-vpu" for CODA7541 present in i.MX53 - (c) "fsl,imx6q-vpu" for CODA960 present in i.MX6q + (b) "fsl,imx51-vpu" for CodaHx4 present in i.MX51 + (c) "fsl,imx53-vpu" for CODA7541 present in i.MX53 + (d) "fsl,imx6q-vpu" for CODA960 present in i.MX6q - reg: should be register base and length as documented in the SoC reference manual - interrupts : Should contain the VPU interrupt. For CODA960,