From patchwork Thu Dec 7 10:20:02 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arseny Solokha X-Patchwork-Id: 845507 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-i2c-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3yss1k0gtXz9sBd for ; Thu, 7 Dec 2017 21:20:26 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752540AbdLGKUY (ORCPT ); Thu, 7 Dec 2017 05:20:24 -0500 Received: from ispman.iskranet.ru ([62.213.33.10]:58118 "EHLO ispman.iskranet.ru" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752279AbdLGKUX (ORCPT ); Thu, 7 Dec 2017 05:20:23 -0500 Received: by ispman.iskranet.ru (Postfix, from userid 8) id CA7D3821EA7; Thu, 7 Dec 2017 17:20:20 +0700 (KRAT) X-Spam-Checker-Version: SpamAssassin 3.3.2 (2011-06-06) on ispman.iskranet.ru X-Spam-Level: X-Spam-Status: No, score=-1.0 required=4.0 tests=ALL_TRUSTED,SHORTCIRCUIT shortcircuit=ham autolearn=disabled version=3.3.2 Received: from KB00016249.iskra.kb (unknown [62.213.40.60]) (Authenticated sender: asolokha@kb.kras.ru) by ispman.iskranet.ru (Postfix) with ESMTPA id 874DA821EA7; Thu, 7 Dec 2017 17:20:20 +0700 (KRAT) From: Arseny Solokha To: Wolfram Sang , linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Valentin Longchamp , Arseny Solokha Subject: [PATCH RESEND 3/4] i2c: mpc: fix PORDEVSR2 mask for MPC8533/44 Date: Thu, 7 Dec 2017 17:20:02 +0700 Message-Id: <20171207102003.23496-4-asolokha@kb.kras.ru> X-Mailer: git-send-email 2.15.1 In-Reply-To: <20171207102003.23496-1-asolokha@kb.kras.ru> References: <20171110075015.23906-1-asolokha@kb.kras.ru> <20171207102003.23496-1-asolokha@kb.kras.ru> Sender: linux-i2c-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-i2c@vger.kernel.org According to the reference manuals for the corresponding SoCs, SEC frequency ratio configuration is indicated by bit 26 of the POR Device Status Register 2. Consequently, SEC_CFG bit should be tested by mask 0x20, not 0x80. Testing the wrong bit leads to selection of wrong I2C clock prescaler on those SoCs. Signed-off-by: Arseny Solokha --- drivers/i2c/busses/i2c-mpc.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/i2c/busses/i2c-mpc.c b/drivers/i2c/busses/i2c-mpc.c index 648a5afded64..aac0ec6dc5fc 100644 --- a/drivers/i2c/busses/i2c-mpc.c +++ b/drivers/i2c/busses/i2c-mpc.c @@ -332,14 +332,18 @@ static u32 mpc_i2c_get_sec_cfg_8xxx(void) if (prop) { /* * Map and check POR Device Status Register 2 - * (PORDEVSR2) at 0xE0014 + * (PORDEVSR2) at 0xE0014. Note than while MPC8533 + * and MPC8544 indicate SEC frequency ratio + * configuration as bit 26 in PORDEVSR2, other MPC8xxx + * parts may store it differently or may not have it + * at all. */ reg = ioremap(get_immrbase() + *prop + 0x14, 0x4); if (!reg) printk(KERN_ERR "Error: couldn't map PORDEVSR2\n"); else - val = in_be32(reg) & 0x00000080; /* sec-cfg */ + val = in_be32(reg) & 0x00000020; /* sec-cfg */ iounmap(reg); } }