[RESEND,3/4] i2c: mpc: fix PORDEVSR2 mask for MPC8533/44

Message ID 20171207102003.23496-4-asolokha@kb.kras.ru
State Accepted
Headers show
Series
  • i2c: mpc: Clean up clock selection
Related show

Commit Message

Arseny Solokha Dec. 7, 2017, 10:20 a.m.
According to the reference manuals for the corresponding SoCs, SEC
frequency ratio configuration is indicated by bit 26 of the POR Device
Status Register 2. Consequently, SEC_CFG bit should be tested by mask 0x20,
not 0x80. Testing the wrong bit leads to selection of wrong I2C clock
prescaler on those SoCs.

Signed-off-by: Arseny Solokha <asolokha@kb.kras.ru>
---
 drivers/i2c/busses/i2c-mpc.c | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

Comments

Wolfram Sang Dec. 30, 2017, 6:11 p.m. | #1
>  			/*
>  			 * Map and check POR Device Status Register 2
> -			 * (PORDEVSR2) at 0xE0014
> +			 * (PORDEVSR2) at 0xE0014. Note than while MPC8533
> +			 * and MPC8544 indicate SEC frequency ratio
> +			 * configuration as bit 26 in PORDEVSR2, other MPC8xxx
> +			 * parts may store it differently or may not have it
> +			 * at all.

So given this comment which you added...

>  			 */
>  			reg = ioremap(get_immrbase() + *prop + 0x14, 0x4);
>  			if (!reg)
>  				printk(KERN_ERR
>  				       "Error: couldn't map PORDEVSR2\n");
>  			else
> -				val = in_be32(reg) & 0x00000080; /* sec-cfg */
> +				val = in_be32(reg) & 0x00000020; /* sec-cfg */

... are you really sure there is no ancient device which needs the
0x00000080?
Wolfram Sang Jan. 15, 2018, 6:22 p.m. | #2
On Thu, Dec 07, 2017 at 05:20:02PM +0700, Arseny Solokha wrote:
> According to the reference manuals for the corresponding SoCs, SEC
> frequency ratio configuration is indicated by bit 26 of the POR Device
> Status Register 2. Consequently, SEC_CFG bit should be tested by mask 0x20,
> not 0x80. Testing the wrong bit leads to selection of wrong I2C clock
> prescaler on those SoCs.
> 
> Signed-off-by: Arseny Solokha <asolokha@kb.kras.ru>

Applied to for-next, thanks!

Patch

diff --git a/drivers/i2c/busses/i2c-mpc.c b/drivers/i2c/busses/i2c-mpc.c
index 648a5afded64..aac0ec6dc5fc 100644
--- a/drivers/i2c/busses/i2c-mpc.c
+++ b/drivers/i2c/busses/i2c-mpc.c
@@ -332,14 +332,18 @@  static u32 mpc_i2c_get_sec_cfg_8xxx(void)
 		if (prop) {
 			/*
 			 * Map and check POR Device Status Register 2
-			 * (PORDEVSR2) at 0xE0014
+			 * (PORDEVSR2) at 0xE0014. Note than while MPC8533
+			 * and MPC8544 indicate SEC frequency ratio
+			 * configuration as bit 26 in PORDEVSR2, other MPC8xxx
+			 * parts may store it differently or may not have it
+			 * at all.
 			 */
 			reg = ioremap(get_immrbase() + *prop + 0x14, 0x4);
 			if (!reg)
 				printk(KERN_ERR
 				       "Error: couldn't map PORDEVSR2\n");
 			else
-				val = in_be32(reg) & 0x00000080; /* sec-cfg */
+				val = in_be32(reg) & 0x00000020; /* sec-cfg */
 			iounmap(reg);
 		}
 	}