From patchwork Fri Feb 25 15:04:12 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 84543 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 19433B70F5 for ; Sat, 26 Feb 2011 02:06:37 +1100 (EST) Received: from localhost ([127.0.0.1]:43510 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1PszFa-0006Z2-4K for incoming@patchwork.ozlabs.org; Fri, 25 Feb 2011 10:06:34 -0500 Received: from [140.186.70.92] (port=42155 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1PszDN-00057t-5v for qemu-devel@nongnu.org; Fri, 25 Feb 2011 10:04:18 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1PszDL-0004AS-Tu for qemu-devel@nongnu.org; Fri, 25 Feb 2011 10:04:17 -0500 Received: from mnementh.archaic.org.uk ([81.2.115.146]:54188) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1PszDL-0004AE-MJ for qemu-devel@nongnu.org; Fri, 25 Feb 2011 10:04:15 -0500 Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.72) (envelope-from ) id 1PszDI-0006IG-Tf; Fri, 25 Feb 2011 15:04:12 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Date: Fri, 25 Feb 2011 15:04:12 +0000 Message-Id: <1298646252-24169-1-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.2.3 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 2) X-Received-From: 81.2.115.146 Cc: patches@linaro.org Subject: [Qemu-devel] [PATCH] target-arm: Don't decode old cp15 WFI instructions on v7 cores X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org In v7 of the ARM architecture, WFI (wait for interrupt) is a first-class instruction, but in previous versions this functionality was provided via a cp15 coprocessor register. Add correct feature checks to the decoding of the cp15 WFI instructions so that they behave correctly for newer cores. In particular, the old 0,c7,c8,2 encoding used on ARM940 has been reused for VA-to-PA translation in v6 and v7. Signed-off-by: Peter Maydell Reviewed-by: Adam Lackorzynski --- This patch stands alone as a fix to target-arm; it's a prerequisite for Adam's VA->PA translation patch, because otherwise attempting a user-read translation will get you a WFI instead... target-arm/translate.c | 35 ++++++++++++++++++++++++++++++----- 1 files changed, 30 insertions(+), 5 deletions(-) diff --git a/target-arm/translate.c b/target-arm/translate.c index dbd958b..baa1256 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -2538,13 +2538,38 @@ static int disas_cp15_insn(CPUState *env, DisasContext *s, uint32_t insn) if (IS_USER(s) && !cp15_user_ok(insn)) { return 1; } - if ((insn & 0x0fff0fff) == 0x0e070f90 - || (insn & 0x0fff0fff) == 0x0e070f58) { - /* Wait for interrupt. */ - gen_set_pc_im(s->pc); - s->is_jmp = DISAS_WFI; + + /* Pre-v7 versions of the architecture implemented WFI via coprocessor + * instructions rather than a separate instruction. + */ + if ((insn & 0x0fff0fff) == 0x0e070f90) { + /* 0,c7,c0,4: Standard v6 WFI (also used in some pre-v6 cores). + * In v7, this must NOP. + */ + if (!arm_feature(env, ARM_FEATURE_V7)) { + /* Wait for interrupt. */ + gen_set_pc_im(s->pc); + s->is_jmp = DISAS_WFI; + } return 0; } + + if ((insn & 0x0fff0fff) == 0x0e070f58) { + /* 0,c7,c8,2: Not all pre-v6 cores implemented this WFI, + * so this is slightly over-broad. + */ + if (!arm_feature(env, ARM_FEATURE_V6)) { + /* Wait for interrupt. */ + gen_set_pc_im(s->pc); + s->is_jmp = DISAS_WFI; + return 0; + } + /* Otherwise fall through to handle via helper function. + * In particular, on v7 and some v6 cores this is one of + * the VA-PA registers. + */ + } + rd = (insn >> 12) & 0xf; if (cp15_tls_load_store(env, s, insn, rd))