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[2/3] ahci: Add PCI ids for Intel Bay Trail, Cherry Trail and Apollo Lake AHCI

Message ID 20171206154110.11548-3-hdegoede@redhat.com
State Not Applicable
Delegated to: David Miller
Headers show
Series ahci: Allow setting a default LPM policy for mobile chipsets | expand

Commit Message

Hans de Goede Dec. 6, 2017, 3:41 p.m. UTC
Add PCI ids for Intel Bay Trail, Cherry Trail and Apollo Lake AHCI
SATA controllers. This commit is a preparation patch for allowing a
different default sata link powermanagement policy for mobile chipsets.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
---
 drivers/ata/ahci.c | 4 ++++
 1 file changed, 4 insertions(+)

Comments

Tejun Heo Dec. 11, 2017, 2:41 p.m. UTC | #1
Hello,

On Wed, Dec 06, 2017 at 04:41:09PM +0100, Hans de Goede wrote:
> Add PCI ids for Intel Bay Trail, Cherry Trail and Apollo Lake AHCI
> SATA controllers. This commit is a preparation patch for allowing a
> different default sata link powermanagement policy for mobile chipsets.
> 
> Signed-off-by: Hans de Goede <hdegoede@redhat.com>

Applied 1-2 to libata/for-4.16.

Thanks.
diff mbox series

Patch

diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c
index 9d842ff6ec51..844f697bedbf 100644
--- a/drivers/ata/ahci.c
+++ b/drivers/ata/ahci.c
@@ -386,6 +386,10 @@  static const struct pci_device_id ahci_pci_tbl[] = {
 	{ PCI_VDEVICE(INTEL, 0xa206), board_ahci }, /* Lewisburg RAID*/
 	{ PCI_VDEVICE(INTEL, 0xa252), board_ahci }, /* Lewisburg RAID*/
 	{ PCI_VDEVICE(INTEL, 0xa256), board_ahci }, /* Lewisburg RAID*/
+	{ PCI_VDEVICE(INTEL, 0x0f22), board_ahci }, /* Bay Trail AHCI */
+	{ PCI_VDEVICE(INTEL, 0x0f23), board_ahci }, /* Bay Trail AHCI */
+	{ PCI_VDEVICE(INTEL, 0x22a3), board_ahci }, /* Cherry Trail AHCI */
+	{ PCI_VDEVICE(INTEL, 0x5ae3), board_ahci }, /* Apollo Lake AHCI */
 
 	/* JMicron 360/1/3/5/6, match class to avoid IDE function */
 	{ PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,