[1/2] target/sh4: add missing tcg_temp_free() in gen_conditional_jump()

Message ID 20171205170013.22337-2-f4bug@amsat.org
State New
Headers show
Series
  • target/sh4: add missing tcg_temp_free()
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Commit Message

Philippe Mathieu-Daudé Dec. 5, 2017, 5 p.m.
missed in c55497ecb8c.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 target/sh4/translate.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

Comments

Aurelien Jarno Dec. 6, 2017, 9:59 p.m. | #1
On 2017-12-05 14:00, Philippe Mathieu-Daudé wrote:
> missed in c55497ecb8c.
> 
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
>  target/sh4/translate.c | 5 ++++-
>  1 file changed, 4 insertions(+), 1 deletion(-)
> 
> diff --git a/target/sh4/translate.c b/target/sh4/translate.c
> index 703020fe87..5aeaabdd8d 100644
> --- a/target/sh4/translate.c
> +++ b/target/sh4/translate.c
> @@ -322,13 +322,16 @@ static void gen_delayed_conditional_jump(DisasContext * ctx)
>          gen_jump(ctx);
>  
>          gen_set_label(l1);
> -        return;
> +        goto done;
>      }
>  
>      tcg_gen_brcondi_i32(TCG_COND_NE, ds, 0, l1);
>      gen_goto_tb(ctx, 1, ctx->pc + 2);
>      gen_set_label(l1);
>      gen_jump(ctx);
> +
> +done:
> +    tcg_temp_free(ds);
>  }
>  
>  static inline void gen_load_fpr64(DisasContext *ctx, TCGv_i64 t, int reg)

AFAIR, temps are not preserved across a branch (contrary to local
temps), so I am not sure they need to be freed.

Patch

diff --git a/target/sh4/translate.c b/target/sh4/translate.c
index 703020fe87..5aeaabdd8d 100644
--- a/target/sh4/translate.c
+++ b/target/sh4/translate.c
@@ -322,13 +322,16 @@  static void gen_delayed_conditional_jump(DisasContext * ctx)
         gen_jump(ctx);
 
         gen_set_label(l1);
-        return;
+        goto done;
     }
 
     tcg_gen_brcondi_i32(TCG_COND_NE, ds, 0, l1);
     gen_goto_tb(ctx, 1, ctx->pc + 2);
     gen_set_label(l1);
     gen_jump(ctx);
+
+done:
+    tcg_temp_free(ds);
 }
 
 static inline void gen_load_fpr64(DisasContext *ctx, TCGv_i64 t, int reg)